R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 106

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
10.4.2
10.4.1.3
10.4.2.1
10.4.2.2
10.4.2.3
If the CM14 bit in the CM1 register is set to 0 (low-speed on-chip oscillator on) or the FRA01bit in the FRA0
register is set to 0, the low-speed on-chip oscillator provides the on-chip oscillator clock.
The on-chip oscillator clock divided-by-1 (no division), -2, -4, -8 or -16 provides the CPU clock. The on-chip
oscillator clock is also the clock source for the peripheral function clocks. Set the CM06 bit to 1 (divide-by-8
mode) when transiting to high-speed clock mode. When the FRA00 bit is set to 1, fOCO40M can be used for
timer RD. When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the
watchdog timer and voltage detection circuit.
In this mode, stopping the XIN clock and high-speed on-chip oscillator, and setting the FMR47 bit in the
FMR4 register to 1 (flash memory low consumption current read mode enabled) enables low consumption
operation.
To enter wait mode from low-speed on-chip oscillator mode, setting the VCA20 bit in the VCA2 register to 1
(internal power low consumption enabled) enables lower consumption current in wait mode.
When enabling reduced internal power consumption using the VCA20 bit, follow Figure 10.11 Procedure for
Enabling Reduced Internal Power Consumption Using VCA20 bit.
Since the CPU clock stops in wait mode, the CPU operated in the CPU clock and the watchdog timer when
count source protection mode is disabled stops. The XIN clock and on-chip oscillator clock do not stop and the
peripheral functions using these clocks maintain operating.
If the CM02 bit is set to 1 (peripheral function clock stops in wait mode), the f1, f2, f4, f8, f32, and fCAN0
clocks stop in wait mode. The power consumption can be reduced.
The MCU enters wait mode when the WAIT instruction is executed.
When the OCD2 bit in the OCD register is set to 1 (on-chip oscillator selected as system clock), set the
OCD1bit in the OCD register to 0 (oscillation stop detection interrupt disabled) before executing the WAIT
instruction.
If the MCU enters wait mode while the OCD1 bit is set to 1 (oscillation stop detection interrupt enabled),
current consumption is not reduced because the CPU clock does not stop.
The I/O port is the status before wait mode was entered is maintained.
Wait Mode
Low-Speed On-Chip Oscillator Mode
Peripheral Function Clock Stop Function
Entering Wait Mode
Pin Status in Wait Mode
Page 84 of 501
10. Clock Generation Circuit