R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 494

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
22.3.2
22.3.2.1
The following workaround should be performed in timer mode.
To write to registers TRBPRE and TRBPR during count operation (TCSTF bit is set to 1), note the following
points:
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Timer RB stops counting after reset. Set the value to timer RB and timer RB prescaler before the count
starts.
Even if the prescaler and timer RB is read out in 16-bit units, these registers are read by 1 byte in the MCU.
Consequently, the timer value may be updated during the period these two registers are being read.
In programmable one-shot generation mode and programmable wait one-shot generation mode, when
setting the TSTART bit in the TRBCR register to 0, 0 (stops counting) or setting the TOSSP bit in the
TRBOCR register to 1 (stops one-shot), the timer reloads the value of reload register and stops. Therefore,
read the timer count value in programmable one-shot generation mode and programmable wait one-shot
generation mode before the timer stops.
The TCSTF bit retains 0 (count stops) for 1 to 2 cycles of the count source after setting the TSTART bit to
1 (count starts) while the count stops.
During this time, do not access registers associated with timer RB
The TCSTF bit retains 1 for 1 to 2 cycles of the count source after setting the TSTART bit to 0 (count
stops) while the count is performing. Timer RB counting is stopped when the TCSTF bit is set to 0.
During this time, do not access registers associated with timer RB
NOTE:
If the TSTOP bit in the TRBCR register is set to 1 during timer operation, timer RB stops immediately.
If 1 is written to the TOSST or TOSSP bit in the TRBOCR register, the value of the TOSSTF bit changes
after one or two cycles of the count source have elapsed. If the TOSSP bit is written to 1 during the period
between when the TOSST bit is written to 1 and when the TOSSTF bit is set to 1, the TOSSTF bit may be
set to either 0 or 1 depending on the content state. Likewise, if the TOSST bit is written to 1 during the
period between when the TOSSP bit is written to 1 and when the TOSSTF bit is set to 0, the TOSSTF bit
may be set to either 0 or 1.
When the TRBPRE register is written continuously, allow three or more cycles of the count source for each
write interval.
When the TRBPR register is written continuously, allow three or more cycles of the prescaler underflow
for each write interval.
Notes on Timer RB
1. Registers associated with timer RB: TRBCR, TRBOCR, TRBIOC, TRBMR, TRBPRE, TRBSC, TRBPR
Timer mode
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(1)
(1)
other than the TCSTF bit.
other than the TCSTF bit.
22. Usage Notes