R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 445

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
20.4.2.1
20.4.2.2
20.4.2.3
20.4.2.4
20.4.2.5
20.4.2.6
20.4.2.7
20.4.2.8
20.4.2.9
20.4.2.10 FMR40 Bit
Figure 20.5 shows the FMR0 Register, Figure 20.6 shows the FMR1 Register and Figure 20.7 shows the FMR4
Register.
This bit indicates the operating status of the flash memory. The bit is 0 during programming, erasing (including
suspend periods), or erase-suspend mode; otherwise, the bit is 1.
The MCU is made ready to accept commands by setting the FMR01 bit to 1 (CPU rewrite mode).
The block0, block1, block2 and block3 do not accept the program and block erase commands if the FMR02 bit
is set to 0 (rewrite disabled).
The block0 and block1 are controlled rewriting in the FMR15 and FMR16 bits if the FMR02 bit is set to 1
(rewrite enabled).
This bit is provided for initializing the flash memory control circuits, as well as for reducing the amount of
current consumed in the flash memory. The flash memory is disabled against access by setting the FMSTP bit to
1. Therefore, the FMSTP bit must be written to by a program transferred to the RAM.
In the following cases, set the FMSTP bit to 1:
Figure 20.11 shows a Process to Reduce Power Consumption in High-Speed On-Chip Oscillator Mode, Low-
Speed On-Chip Oscillator Mode (XIN Clock Stops) and Low-Speed Clock Mode (XIN Clock Stops). Note that
when going to stop or wait mode while the CPU rewrite mode is disabled, the FMR0 register does not need to
be set because the power for the flash memory is automatically turned off and is turned back on again after
returning from stop or wait mode.
This is a read-only bit indicating the status of auto program operation. The bit is set to 1 when a program error
occurs; otherwise, it is cleared to 0. For details, refer to the description of the 20.4.5 Full Status Check.
This is a read-only bit indicating the status of auto erase operation. The bit is set to 1 when an erase error occurs;
otherwise, it is set to 0. Refer to 20.4.5 Full Status Check for the details.
Setting this bit to 1 (EW1 mode) places the MCU in EW1 mode.
When the FMR02 bit is set to 1 (rewrite enabled) and the FMR15 bit is set to 0 (rewrite enabled), the block0
accepts the program command and block erase command.
When the FMR02 bit is set to 1 (rewrite enabled) and the FMR16 bit is set to 0 (rewrite enabled), the block1
accepts the program command and block erase command.
The suspend function is enabled by setting the FMR40 bit to 1 (enable).
•
•
When flash memory access resulted in an error while erasing or programming in EW0 mode (FMR00 bit
not reset to 1 (ready))
When entering high-speed on-chip oscillator mode, low-speed on-chip oscillator mode (XIN clock stop)
FMR00 Bit
FMR01 Bit
FMR02 Bit
FMSTP Bit
FMR06 Bit
FMR07 Bit
FMR11 Bit
FMR15 Bit
FMR16 Bit
Page 423 of 501
20. Flash Memory