R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 85

IC R8C/23 MCU FLASH 48LQFP

R5F21236KFP#U0

Manufacturer Part Number
R5F21236KFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet

Specifications of R5F21236KFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#W4
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Table 7.28
X: 0 or 1
NOTE:
Table 7.29
X: 0 or 1
NOTE:
Table 7.30
X: 0 or 1
NOTES:
Table 7.31
X: 0 or 1
NOTES:
Register
Register
Setting
Setting
Register
Register
value
value
Setting
Setting
1. Pulled up by setting the PU06 bit in the PUR0 register to 1.
1. Pulled up by setting the PU06 bit in the PUR0 register to 1.
1. Pulled up by setting the PU06 bit in the PUR0 register to 1.
2. N-channel open drain output by setting the SOOS bit in the SSMR2 register to 1 when this pin functions as output.
1. Pulled up by setting the PU07 bit in the PUR0 register to 1.
2. N-channel open drain output by setting the CSOS bit in the SSMR2 register to 1 when this pin functions as output.
value
value
Bit
Bit
Bit
Bit
PD3_3
PD3_4
PD3_1
PD3
PD3
PD3
Port P3_0/TRAO
Port P3_1/TRBO
Port P3_3/SSI
Port P3_4/SDA/SCS
0
0
1
1
X
X
0
0
1
1
X
X
X
PD3_0
0
1
X
X
PD3
X
0
1
Clock Synchronous Serial I/O with Chip Select
CSS1
SSI output control
(Refer to Table 16.4 Association between
Page 63 of 501
X
0
0
0
0
0
1
1
Communication Modes and I/O Pins.)
TMOD1
SSMR2
0
0
Other than 00b
X
X
0
0
0
1
CSS0
TRAIOC
TRBMR
TOENA
X
0
0
0
0
1
0
1
01b
0
0
1
TMOD0
IICSEL
PMR
0
0
X
X
0
0
0
0
1
SSI input control
Input port
Output port
TRAO output
ICCR1
ICE
X
X
0
0
1
0
X
X
X
X
0
0
1
TRBIOC
TOCNT
(1)
X
X
1
0
Input port
Output port
SCS input
SCS output
SDA input/output
Input port
Output port
TRBO output
IICSEL
PMR
(1)
0
1
0
1
0
0
(2)
(2)
(1)
Input port
Output port
SSI input
SSI output
Function
Function
(1)
(2)
(2)
Function
7. Programmable I/O Ports
Function

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