R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 128

IC R8C/23 MCU FLASH 48LQFP

R5F21236KFP#U0

Manufacturer Part Number
R5F21236KFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet

Specifications of R5F21236KFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Part Number:
R5F21236KFP#U0R5F21236KFP#V0
Manufacturer:
Renesas Electronics America
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Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#W4
Manufacturer:
Renesas Electronics America
Quantity:
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 12.7
Table 12.5
Watchdog Timer, Oscillation Stop Detection, Voltage Monitor 2, Address Break
Software, Address Match, Single-Step
12.1.6.5
12.1.6.6
Figure 12.7 shows an Interrupt Response Time. The interrupt response time is the period between an interrupt
request generation and the execution of the first instruction in an interrupt routine. An interrupt response time
includes the period between an interrupt request generation and the completed execution of an instruction
(refer to (a) in Figure 12.7) and the period required to perform an interrupt sequence (20 cycles, refer to (b) in
Figure 12.7).
When an interrupt request of a maskable interrupt is acknowledged, the interrupt priority level of the
acknowledged interrupt is set in the IPL.
When a software interrupt and special interrupt request are acknowledged, the level listed in Table 12.5 is set to
the IPL.
Table 12.5 lists the IPL Value When Software or Special Interrupt Is Acknowledged.
Interrupt request is generated Interrupt request is acknowledged
Interrupt Response Time
IPL Change when Interrupt Request is Acknowledged
IPL Value When Software or Special Interrupt Is Acknowledged
Interrupt Response Time
(a) Period between an interrupt request generation and the completed execution of an
(b) 21 cycles for address match and single-step interrupts.
Page 106 of 501
instruction. The length of this time varies depending on the instruction being executed.
The DIVX instruction requires the longest time; 30 cycles (no wait and when the register
is set as the divisor)
Instruction
(a)
Interrupt Sources
Interrupt response time
Interrupt sequence
20 Cycles (b)
interrupt routine
Instruction in
Value Set to IPL
Time
Not changed
7
12. Interrupts

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