R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 393

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
18.1
(1) CAN Message Box
(2) Acceptance Mask Registers
(3) CAN SFR Registers
The CAN0 module has the following registers.
Explanation of each register is given below.
A CAN module is equipped with 16 slots (16 bytes or 8 words each). Slots 14 and 15 can be used as Basic
CAN.
A CAN module is equipped with 3 masks for the acceptance filter.
CAN Module-Related Registers
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Priority of the slots: The smaller the number of the slot, the higher the priority, in both transmission and
reception.
A program can define whether a slot is defined as transmitter or receiver.
CAN0 global mask register (C0GMR register: 6 bytes)
Configuration of the masking condition for acceptance filtering processing to slots 0 to 13
CAN0 local mask A register (C0LMAR register: 6 bytes)
Configuration of the masking condition for acceptance filtering processing to slot 14
CAN0 local mask B register (C0LMBR register: 6 bytes)
Configuration of the masking condition for acceptance filtering processing to slot 15
CAN0 message control register i (C0MCTLi register: 8 bits x 16) (i = 0 to 15)
Control of transmission and reception of a corresponding slot
CAN0 control register (C0CTLR register: 16 bits)
Control of the CAN protocol
CAN0 status register (C0STR register: 16 bits)
Indication of the protocol status
CAN0 slot status register (C0SSTR register: 16 bits)
Indication of the status of contents of each slot
CAN0 interrupt control register (C0ICR register: 16 bits)
Selection of interrupt enabled or disabled for each slot
CAN0 extended ID register (C0IDR register: 16 bits)
Selection of ID format (standard or extended) for each slot
CAN0 configuration register (C0CONR register: 16 bits)
Configuration of the bus timing
CAN0 receive error count register (C0RECR register: 8 bits)
Indication of the error status of the CAN module in reception: the counter value is incremented or
decremented according to the error occurrence.
CAN0 transmit error count register (C0TECR register: 8 bits)
Indication of the error status of the CAN module in transmission: the counter value is incremented or
decremented according to the error occurrence.
CAN0 acceptance filter support register (C0AFS register: 16 bits)
Decoding the received ID for use by the acceptance filter support unit
Page 371 of 501
18. CAN Module