R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 374

IC R8C/23 MCU FLASH 48LQFP

R5F21236KFP#U0

Manufacturer Part Number
R5F21236KFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet

Specifications of R5F21236KFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#W4
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 16.48
ICSR register
ICSR register
ICCR1 register
ICSR Register
Write transmit data to ICDRT register
Write transmit data to ICDRT register
Read TDRE bit in ICSR register
Read TEND bit in ICSR register
Dummy-read in ICDRR register
Example of Register Setting in Slave Transmit Mode (I
No
No
No
Slave transmit mode
TDRE = 1 ?
TEND = 1 ?
Last byte ?
Page 352 of 501
TEND bit ← 0
AAS bit ← 0
TDRE Bit ← 0
End
TRS bit ← 0
Yes
Yes
Yes
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(1) Set the AAS bit to 0
(2) Set the transmit data (except the last byte)
(3) Wait the ICDRT register is empty
(4) Set the transmit data of the last byte
(5) Wait the last byte is transmitted
(6) Set the TEND bit to 0
(7) Set to slave receive mode
(8) Dummy-read in the ICDRR register to release the
(9) Set the TDRE bit to 0
SCL signal
16. Clock Synchronous Serial Interface
2
C Bus Interface Mode)

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