R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 125

IC R8C/23 MCU FLASH 48LQFP

R5F21236KFP#U0

Manufacturer Part Number
R5F21236KFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet

Specifications of R5F21236KFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Part Number:
R5F21236KFP#U0R5F21236KFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#W4
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 12.5
INTi Interrupt Control Register (i = 0 to 3)
b7 b6 b5 b4 b3 b2 b1
NOTES:
1.
2.
3.
4.
0
Only 0 can be w ritten to the IR bit. (Do not w rite 1.)
Rew rite the interrupt control register, rew rite it w hen the interrupt request w hich is applicable for its register is not
generated. Refer to 12.7.5 Changing Interrupt Control Register Contents.
If the INTiPL bit in the INTEN register is set to 1 (both edges), set the POL bit to 0 (selects falling edge).
The IR bit may be set to 1 (requests interrupt) w hen the POL bit is rew ritten. Refer to 12.7.4 Changing Interrupt
Sources.
Registers INT0IC to INT3IC
b0
Bit Symbol
(b7-b6)
Symbol
INT2IC
INT1IC
INT3IC
INT0IC
ILVL0
ILVL1
ILVL2
Page 103 of 501
POL
(b5)
IR
Interrupt priority level select bits
Interrupt request bit
Polarity sw itch bit
Reserved bit
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
(2)
Address
Bit Name
005Ah
0055h
0059h
005Dh
(4)
b2 b1 b0
0 0 0 : Level 0 (interrupt disable)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0 : Requests no interrupt
1 : Requests interrupt
0 : Selects falling edge
1 : Selects rising edge
Set to 0
After Reset
XX00X000b
XX00X000b
XX00X000b
XX00X000b
Function
(3)
12. Interrupts
RW
RW
RW
RW
RW
RW
RW
(1)

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