R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 499

IC R8C/23 MCU FLASH 48LQFP

R5F21236KFP#U0

Manufacturer Part Number
R5F21236KFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet

Specifications of R5F21236KFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Manufacturer:
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R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
22.3.3.4
22.3.3.5
22.3.3.6
22.3.3.7
Change procedure
Change procedure
Change procedure
Change procedure: When setting to complementary PWM mode (including re-set), or changing
Change procedure: When stopping complementary PWM mode
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the TCK2 to TCK0 bits in the TRDCRi register.
(1) Set the TSTARTi (i = 0 or 1) bit in the TRDSTR register to 0 (count stops).
(2) Change the TCK2 to TCK0 bits in the TRDCRi register.
(3) Wait 2 cycles or more of f1.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator stops).
(1) Set the TSTART0 bit in the TRDSTR register to 0 (count stops).
(2) Set the CMD1 to CMD0 bits in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3
(3) Set the CMD1 to CMD0 bits to 01b (reset synchronous PWM mode).
(4) Set the registers associated with other Timer RD again.
(1) Set both the TSTART0 and TSTART1 bits in the TRDSTR register to 0 (count stops).
(2) Set the CMD1 to CMD0 bits in the TRDFCR register to 00b (timer mode, PWM mode, and PWM3
(3) Set the DMD1 to CMD0 bits to 10b or 11b (complementary PWM mode).
(4) Set the registers associated with other Timer RD again.
(1) Set both the TSTART0 and CSEL1 bits in the TRDSTR register to 0 (count stops).
(2) Set the CMD1 to CMD bits to 00b (other than reset synchronous PWM mode, complementary PWM
When switching the count source, switch it after the count stops.
When changing the count source from fOCO40M to the other and stopping fOCO40M, wait 2 cycles or
more of f1 after setting the clock switch, and then stop fOCO40M.
Set the pulse width of input capture signal to 3 cycles or more of the Timer RD operation clock. (Refer to
Table 14.11 Timer RD Operation Clocks.)
The value in the TRDi register is transferred to the TRDGRji register after 2 to 3 cycles of the Timer RD
operation clock since the input capture signal is applied to the TRDIOji pin (i = 0 or 1, j = either A, B, C or
D) (no digital filter).
When reset synchronous PWM mode is used for motor control, use it with OLS0 = OLS1.
Set to reset synchronous PWM mode in the following procedure:
When complementary PWM mode is used for motor control, use it with OLS0 = OLS1.
Change the CMD1 to CMD0 bits in the TRDFCR register in the following procedure.
Do not write to the TRDGRA0, TRDGRB0, TRDGRA1 and TRDGRB1 registers during operation.
When changing the PWM waveform, transfer the value written to the TRDGRD0, TRDGRC1 and
TRDGRD1 registers to the TRDGRB0, TRDGRA1 and TRDGRB1 registers using the buffer operation.
However, to write data to the TRDGRD0, TRDGRC1, or TRDGRD1 register, set bits BFD0, BFC1, and
BFD1 to 0 (general register). After this, bits BFD0, BFC1, and BFD1 may be set to 1 (buffer register).
The PWM period cannot be changed.
mode).
mode)
mode)
Count Source Switch
Input Capture Function
Reset Synchronous PWM Mode
Complementary PWM Mode
the transfer timing from the buffer register to the general register in complementary PWM
mode.
Page 477 of 501
22. Usage Notes

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