R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 288

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.113 Operation When Value in Buffer Register Is Set to 0000h in Complementary PWM
14.3.12.8 Count Source fOCO40M
The count source fOCO40M can be used with supply voltage VCC = 3.0 to 5.5 V. For supply voltage other than
that, do not set bits TCK2 to TCK0 in registers TRDCR0 and TRDCR to 110b (select fOCO40M as the count
source).
When the value in the buffer register is set to 0000h:
Transfer by the compare match in the TRD0 and TRDGRA0 registers.
And then, when setting the buffer register to 0001h or above and the smaller value than the one in the
TRDGRA0 register, and the compare match in the TRD0 and TRDGRA0 registers in the fist time after
setting, the value is transferred to the general register. After that, transfer the value with the timing selected
by the CMD1 to CMD0 bits.
TRDGRD0 register
TRDGRB0 register
TRDIOD0 output
TRDIOB0 output
The above applies to the following conditions:
• The CMD1 to CMD0 bits in the TRDFCR register are set to 10b.
• Both the OLS0 and OLS1 bits in the TRDFCR register are set to “1” (active “H” for normal-phase and counter-phase).
(Data in the buffer register is transferred at the underflow in the TRD1 register in PWM mode.)
Mode
m + 1
0000h
n 2
n1
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Transfer with timing
set by CMD1 to
CMD0 bits
n2
Transfer
n1
n1
Transfer
0000h
Transfer by
compare match in
TRD0 and
TRDGRA0 registers
because content in
TRDGRD0 register
is set to 0000h.
0000h
m: Setting Value in TRDGRA0 Register
Transfer by
compare match in
TRD0 and
TRDGRA0
registers because
of first setting to
0001h ≤ n1 < m
n1
Transfer
n1
Count value in TRD0 register
Transfer with timing
set by CMD1 to
CMD0 bits
Transfer
Count value in TRD1 register
14. Timers