R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 64

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
6.2
Figure 6.7
Table 6.2
NOTE:
Table 6.2 lists the Procedure for Setting Bits Associated with Voltage Monitor 1 Reset and Figure 6.7 shows an
Example of Voltage Monitor 1 Reset Operation. To use the voltage monitor 1 reset to exit stop mode, set the
VW1C1 bit in the VW1C register to 1 (digital filter disabled).
1. When the VW1C0 bit is set to 0, procedures 3, 4 and 5 can be executed simultaneously (with 1
When the VW1C1 bit is set
to 0 (digital filter enabled)
When the VW1C1 bit is set
to 1 (digital filter disabled)
and the VW1C7 bit is set
to 1
Step
instruction).
4
5
Voltage Monitor 1 Reset
1
2
3
6
7
8
9
(1)
(1)
VW1C1 and VW1C7: Bits in VW1C register
Procedure for Setting Bits Associated with Voltage Monitor 1 Reset
Example of Voltage Monitor 1 Reset Operation
Set the VCA26 bit in the VCA2 register to 1 (voltage detection 1 circuit enabled)
Wait for td(E-A)
Select the sampling clock of the digital filter
by the VW1F0 to VW1F1 bits in the VW1C
register
Set the VW1C1 bit in the VW1C register to
“0” (digital filter enabled)
Set the VW1C6 bit in the VW1C register to 1 (voltage monitor 1 reset mode)
Set the VW1C2 bit in the VW1C register to 0
Set the CM14 bit in the CM1 register to 0
(low-speed on-chip oscillator on)
Wait for the sampling clock of the digital
filter x 4 cycles
Set the VW1C0 bit in the VW1C register to 1 (enables voltage monitor 1 reset)
The above applies to the following conditions.
• VCA26 bit in VCA2 register = 1 (voltage detection 1 circuit enabled)
• VW1C0 bit in VW1C register = 1 (enables voltage monitor 1 reset )
• VW1C6 bit in VW1C register = 1 (voltage monitor 1 reset mode)
When the internal reset signal is held “L”, the pins, CPU and SFR are reset.
The internal reset signal is changed from “L” to “H”, the program is executed beginning with the address indicated by the
reset vector.
Refer to 4. Special Function Registers (SFRs) for the SFR status after reset.
Page 42 of 501
Internal reset signal
Internal reset signal
When Using Digital Filter
Vdet1
VCC
Sampling clock of
digital filter x 4 cycles
Set the VW1C7 bit in the VW1C register to
1
Set the VW1C1 bit in the VW1C register to
1 (digital filter disabled)
−
− (no wait time)
When Not Using Digital Filter
6. Voltage Detection Circuit
fOCO-S
fOCO-S
1
1
x 32
x 32