R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 217

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Table 14.25
i = 0 or 1, j = either A, B, C or D
Count Sources
Count Operations
Count Period
Waveform Output Timing
Count Start Condition
Count Stop Conditions
Interrupt Request Generation
Timing
TRDIOA0 Pin Function
TRDIOB0, TRDIOC0, TRDIOD0,
TRDIOA1 to TRDIOD1 Pin
Functions
INT0 Pin Function
Read from Timer
Write to Timer
Selection Functions
Item
Output Compare Function Specifications
Page 195 of 501
f1, f2, f4, f8, f32, fOCO40M
External signal input to the TRDCLK pin (valid edge selected by a program)
Increment
• When the CCLR2 to CCLR0 bits in the TRDCRi register are set to 000b (free-
• The CCLR1 to CCLR0 bits in the TRDCRi register are set to 01b or 10b (set the
Compare match
Write 1 (count starts) to the TSTARTi bit in the TRDSTR register.
• Write 0 (count stops) to the TSTARTi bit in the TRDSTR register when the CSELi
• When the CSELi bit in the TRDSTR register is set to 0, the count stops at the
• Compare match (the content in the TRDi register matches with the content in the
• TRDi register overflows
Programmable I/O port, output-compare output or TRDCLK (external clock) input
Programmable I/O port or output-compare output (select every pin)
Programmable I/O port, pulse output forced cutoff signal input or INT0 interrupt
input
The count value can be read by reading the TRDi register.
• When the SYNC bit in the TRDMR register is set to 0 (channels 0 and 1 operate
• When the SYNC bit in the TRDMR register is set to 1 (channels 0 and 1 operate
• Output-compare output pin selected
• Output level at the compare match selected
• Initial output level selected
• Timing to set the TRDi register to 0000h
• Buffer operation (refer to 14.3.2 Buffer Operation )
• Synchronous operation (refer to 14.3.3 Synchronous Operation )
• Output pin in the TRDGRCi and TRDGRDi registers changed
• Pulse output forced cutoff signal input (refer to 14.3.4 Pulse Output Forced
• Timer RD can be used as the internal timer without output.
running operation)
1/fk × 65536 fk: Frequency of count source
TRDi register to 0000h at the compare match in the TRDGRji register.)
Frequency of count source x (n + 1)
n: Setting value in the TRDGRji register
bit in the TRDSTR register is set to 1.
The output compare output pin holds output level before the count stops.
compare match in the TRDGRAi register.
The output compare output pin holds level after output change by the
compare match.
TRDGRji register.)
independently)
Data can be written to the TRDi register.
synchronously).
Data can be written to both the TRD0 and TRD1 registers by writing to the TRDi
register.
Either 1 pin or multiple pins of the TRDIOAi, TRDIOBi, TRDIOCi or TRDIODi pin.
“L” output, “H” output or output level inversed
Set the level at period from the count start to the compare match.
Overflow or compare match in the TRDGRAi register
The TRDGRCi register can be used as output control of the TRDIOAi pin and the
TRDGRDi register can be used as output control of the TRDIOBi pin.
Cutoff )
Specification
14. Timers