R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 140

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
12.6
Figure 12.20
Table 12.8
Timer RD
Clock Synchronous
Serial I/O with Chip
Select
I
2
Timer RD (channel 0), timer RD (channel 1), clock synchronous serial I/O with chip select and I
have several interrupt request sources and an interrupt request is generated by the logical OR of several interrupt
request sources and the logical OR is reflected in the IR bit in the interrupt control register. Therefore, these
peripheral functions which have the status register of its own interrupt request sources (status register) and the
enable register of the interrupt request sources (enable register) control the generations of the interrupt request
(change of the IR bit in the interrupt control register). Table 12.8 lists the Registers Associated with Timer RD
Interrupt, Clock Synchronous Serial I/O with Chip Select Interrupt, and I
12.20 shows the Block Diagram of Timer RD Interrupt.
C Bus Interface
Timer RD Interrupt, Clock Synchronous Serial I/O with Chip Select Interrupts
and I
Sources)
Channel 0
Channel 1
2
Chip Select Interrupt, and I
Registers Associated with Timer RD Interrupt, Clock Synchronous Serial I/O with
Block Diagram of Timer RD Interrupt
C bus Interface Interrupts (Interrupts with Multiple Interrupt Request
i = 0 or 1
IMFA, IMFB, IMFC, IMFD, OVF, UDF: Bits in TRDSRi register
IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRDIER register
OVIE bit
Page 118 of 501
UDF bit
OVF bit
Channel i
Interrupt Request Source
TRDSR0
TRDSR1
SSSR
ICSR
IMIEA bit
IMIEB bit
IMIEC bit
IMIED bit
IMFC bit
IMFD bit
IMFA bit
IMFB bit
Status Register of
2
C bus Interface Interrupt
Interrupt Request Source
TRDIER0
TRDIER1
SSER
ICIER
Enable Register of
Timer RD (channel i)
Interrupt request
(IR bit in TRDiIC register)
2
C bus Interface Interrupt and Figure
TRD0IC
TRD1IC
SSUIC
IICIC
Interrupt Control
Register
2
C bus interface
12. Interrupts