R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 449

IC R8C/23 MCU FLASH 48LQFP

R5F21236KFP#U0

Manufacturer Part Number
R5F21236KFP#U0
Description
IC R8C/23 MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/23r
Datasheet

Specifications of R5F21236KFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
For Use With
RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#U1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
R5F21236KFP#U0R5F21236KFP#W4
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 20.7
Flash Memory Control Register 4
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
5.
0
When setting this bit to 1, set to 1 immediately after setting it first to 0. Do not generate an interrupt betw een setting
the bit to 0 and setting it to 1.
This bit is enabled w hen the FMR40 bit is set to 1 (enable) and this bit can be w ritten during the period betw een
issuing an erase command and completing an erase (This bit is set to 0 during the periods other than above.)
In EW0 mode, this can be set to 0 or 1 by a program.
In EW1 mode, this bit is automatically set to 1 if a maskable interrupt is generated during an erase operation w hile the
FMR40 bit is set to 1. Do not set this bit to 1 by a program (0 can be w ritten).
The FMR42 bit is enabled only w hen the FMR40 bit is set to 1 (enable) and programming to the FMR42 bit is enabled
until the auto-program ends since the program command is generated. (This bit is set to 0 during periods other than
above.)
In EW0 mode, 0 or 1 can be programmed to the FMR42 bit by a program.
In EW1 mode, the FMR42 bit is automatically set to 1 by generating a maskable interrupt during the auto-program
w hen the FMR40 bit is set to 1. 1 cannot be programmed to the FMR42 bit by a program.
In high-speed clock mode and high-speed on-chip oscillator mode, set the FMR47 bit to 0 (disabled).
Set the FMR01 bit in the FMR0 register to 0 (CPU rew rite mode disabled) in low -pow er-consumption read mode.
b3 b2
b1 b0
FMR4 Register
Bit Symbol
(b5-b2)
Symbol
FMR46
FMR47
FMR40
FMR41
FMR42
FMR43
FMR44
FMR4
Page 427 of 501
Erase-suspend function
enable bit
Erase-suspend request bit
Program-suspend request bit
Erase command flag
Program command flag
Reserved bit
Read status flag
Low -pow er consumption read
mode enable bit
(1)
Address
Bit Name
01B3h
(1,4)
(2)
(3)
0 : Disable
1 : Enable
0 : Erase restart
1 : Erase-suspend request
0 : Program restart
1 : Program-suspend request
0 : Erase not executed
1 : During erase execution
0 : Program not executed
1 : During program execution
Set to 0
0 : Disables reading
1 : Enables reading
0 : Disable
1 : Enable
After Reset
01000000b
Function
20. Flash Memory
RW
RW
RW
RW
RW
RO
RO
RO
RO

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