R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 116

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
10.6
10.6.1
10.6.2
10.6.3
10.6.4
When entering stop mode, set the FMR01 bit to “0” (CPU rewrite mode disabled) and the CM10 bit to “1” (stop
mode). An instruction queue pre-reads 4 bytes from the instruction which sets the CM10 bit in the CM1 register
to “1” (stop mode) and the program stops. Insert at least 4 NOP instructions following the JMP.B instruction
after the instruction which sets the CM10 bit to “1”.
• Example to enter stop mode
When entering wait mode, set the FMR01 bit to “0” (CPU rewrite mode disabled) and execute the WAIT
instruction. An instruction queue pre-reads 4 bytes from the WAIT instruction and the program stops. Insert at
least 4 NOP instructions after the WAIT instruction.
• Example to execute the WAIT instruction
Since the oscillation stop detection function cannot be used if the XIN clock frequency is less than 2 MHz, set
the OCD1 to OCD0 bits to 00b.
Ask the maker of the oscillator to specify the beat oscillation circuit constants on your system.
Notes on Clock Generation Circuit
Stop Mode
Wait Mode
Oscillation Stop Detection Function
Oscillation Circuit Constants
LABEL_001:
Page 94 of 501
BCLR
BSET
FSET
BSET
JMP.B
NOP
NOP
NOP
NOP
BCLR
FSET
WAIT
NOP
NOP
NOP
NOP
1,FMR0
0,PRCR
I
0,CM1
LABEL_001
1,FMR0
I
; CPU rewrite mode disabled
; Protect disabled
; Enable interrupt
; Stop mode
; CPU rewrite mode disabled
; Enable interrupt
; Wait mode
10. Clock Generation Circuit