R5F21236KFP#U0 Renesas Electronics America, R5F21236KFP#U0 Datasheet - Page 293

• Manufacturer Part Number: R5F21236KFP#U0
• Description: IC R8C/23 MCU FLASH 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/23r

Specifications of R5F21236KFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• For Use With: RCDK8C - KIT DEV EVAL FOR CAN R8C/23R0E521237CPE00 - EMULATOR COMPACT R8C/20/21/22/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/22 Group, R8C/23 Group
Rev.2.00 Aug 20, 2008
REJ09B0251-0200
Figure 14.117 TRECR1 Register in Output Compare Mode
Figure 14.118 TRECR2 Register in Output Compare Mode
Timer RE Control Register 1
Timer RE Control Register 2
b7 b6 b5 b4
b7 b6 b5 b4
0 0
0
b3 b2
0
b3 b2 b1 b0
0 0
b1 b0
0 0
Bit Symbol
Bit Symbol
TSTART
TRECR1
TRERST
TOENA
(b6-b5)
Symbol
TRECR2
TCSTF
(b4-b0)
(b7-b6)
Symbol
COMIE
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(b0)
INT
—
—
—
—
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Timer RE count status flag
TREO pin output enable bit
Interrupt request timing bit
Timer RE reset bit
Reserved bit
Timer RE count start bit
Reserved bit
Compare match interrupt enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
Address
Bit Name
011Ch
011Dh
0 : During count stop
1 : In count
0 : Disable clock output
1 : Enable clock output
Set to 0 in output compare mode
When setting this bit to 0 after setting it to
1, the follow ings w ill occur.
• The TRESEC, TREMIN, and TRECR2
• The TCSTF, INT, and TSTART bits in the
• The 8-bit counter is set to 00h and
Set to 0
0 : Count stops
1 : Count starts
Set to 0
0 : Disable compare match interrupt
1 : Enable compare match interrupt
TRECR1 register are set to 0.
registers are set to 00h.
the 4-bit counter is set to 0h.
After Reset
After Reset
Function
Function
00h
00h
14. Timers
RW
RW
RW
RW
RW
RW
RO
—
RW
RW
RW
—