SLXT973QC.A2

Manufacturer Part NumberSLXT973QC.A2
ManufacturerIntel
SLXT973QC.A2 datasheet
 

Specifications of SLXT973QC.A2

Lead Free Status / RoHS StatusNot Compliant  
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LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
2.0
Signal Descriptions
Table 2.
LXT973 Port 0 Signal Descriptions
Pin #
Signal Names
44
TXD0_3
43
TXD0_2
42
TXD0_1
39
TXD0_0
38
TXEN0
36
TXER0
37
TXCLK0
29
RXD0_3
30
RXD0_2
31
RXD0_1
32
RXD0_0
33
RXDV0
35
RXER0
34
RXCLK0
45
COL0
46
CRS0
1. AI = Analog Input, AO = Analog Output, I = Input, O = Output, OD = Open Drain output,
ST = Schmitt Triggered input, TS = Tri-State-able output, SL = Slew-rate Limited output,
IP = Weak Internal Pull-up, ID = Weak Internal Pull-down.
16
1
Type
Signal Description
Transmit Data. TXD0_n is a bundle of parallel data signals driven by the
MAC controller, which TXD0<3:0> transition synchronously with respect
I
to the TXCLK0. TXD0<0> is the least significant bit. TXD0<3:0> are
monitored in normal mode only.
Transmit Enable. The MAC asserts TXEN0 when it drives data on
I
TXD0n. This signal must be synchronized to TXCLK0.
Transmit Error. TXER0 is a 100 Mbps only signal. The MAC asserts this
input when an error has occurred in the transmit data stream. When
I
operating at 100 Mbps, the LXT973 responds by sending "H symbols” on
the line. In Symbol mode, this pin acts as TXD0_4.
Transmit Clock. TXCLK0 is sourced by the LXT973 in both 10 Mbps
and 100 Mbps modes.
O, TS
2.5 MHz for 10 Mbps operation
25 MHz for 100 Mbps operation.
Receive Data.The LXT973 drives received data on these outputs,
O, TS
synchronous to RXCLK0.
Receive Data Valid. The LXT973 asserts this signal when it drives valid
O, TS
data on RXD0n. This output is synchronous to RXCLK0.
Receive Error. The LXT973 asserts this output when it receives invalid
O, TS
symbols from the network. RXER0 is synchronous to RXCLK0. In
Symbol mode, this pin acts as RXD0_4.
Receive Clock. RXCLK0 is sourced by the LXT973 in both 10 Mbps and
100 Mbps modes.
O, TS
2.5 MHz for 10 Mbps operation
25 MHz for 100 Mbps operation.
Collision Detected. The LXT973 asserts this output when a collision is
O, TS
detected. This output remains High for the duration of the collision. COL0
is asynchronous and is inactive during full-duplex operation.
Carrier Sense. During half-duplex operation, the LXT973 asserts this
output when either the transmit or receive medium is non-idle. During
O, TS
full-duplex operation, CRS0 is asserted only when receive medium is
non-idle.
Datasheet
Document #: 249426
Revision #: 002
Rev. Date: March 1, 2002