SLXT973QC.A2 Intel, SLXT973QC.A2 Datasheet - Page 7

no-image

SLXT973QC.A2

Manufacturer Part Number
SLXT973QC.A2
Description
Manufacturer
Intel
Datasheet

Specifications of SLXT973QC.A2

Lead Free Status / RoHS Status
Not Compliant
Tables
Datasheet
Document #: 249426
Revision #: 002
Rev. Date: March 1, 2002
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
LXT973 PQFP Pin List ........................................................................................13
LXT973 Port 0 Signal Descriptions .....................................................................16
LXT973 Port 1 Signal Descriptions .....................................................................17
LXT973 Network Interface Signal Descriptions...................................................18
LXT973 Global Control & Configuration Signal Descriptions ..............................19
LXT973 Power Supply Signal Descriptions.........................................................20
LXT973 Per Port LED and Configuration Signal Descriptions ............................20
Carrier Sense, Loopback, and Collision Conditions ............................................26
Configuration Settings (Hardware Control Interface) ..........................................31
LED Configurations .............................................................................................40
Magnetics Requirements.....................................................................................43
Mode Control Settings.........................................................................................48
Configuration Settings (Hardware Control Interface) ..........................................49
Next Page Code Word Definitions.......................................................................51
Common Register Set .........................................................................................61
Register Bit Descriptions .....................................................................................61
Control Register (Address 0)...............................................................................62
Status Register (Address 1) ................................................................................63
PHY Identification Register 1 (Address 2)...........................................................64
PHY Identification Register 2 (Address 3)...........................................................64
Auto-Negotiation Advertisement Register (Address 4)........................................65
Auto-Negotiation Link Partner Base Page Ability Register (Address 5) ..............66
Auto-Negotiation Expansion Register (Address 6)..............................................67
Auto-Negotiation Next Page Transmit Register (Address 7)...............................67
Auto-Negotiation Link Partner Next Page Ability Register (Address 8)...............68
Port Configuration Register (Address 16) ...........................................................68
Special Function Register (Address 27)..............................................................70
Magnetics Requirements.....................................................................................71
Absolute Maximum Ratings.................................................................................72
Operating Conditions...........................................................................................72
Digital Input/Output Characteristics2...................................................................73
Digital Input/Output Characteristics - MII Pins.....................................................73
REFCLK Characteristics .....................................................................................74
LED Pin Characteristics ......................................................................................74
100BASE-TX Transceiver Characteristics ..........................................................74
10BASE-T Transceiver Characteristics...............................................................75
100BASE-FX Transceiver Characteristics ..........................................................75
10BASE-T Link Integrity Timing Characteristics .................................................75
Twisted-Pair Pins ................................................................................................76
MII - 100BASE-TX Transmit Timing Parameters - 4B Mode...............................77
MII - 100BASE-TX Receive Timing Parameters - 4B Mode................................78
100BASE-FX Transmit Timing Parameters.........................................................79
100BASE-FX Receive Timing Parameters..........................................................80
MII - 10BASE-T Transmit Timing Parameters (Parallel Mode) ...........................81
MII - 10BASE-T Receive Timing Parameters (Parallel Mode) ............................82
10BASE-T SQE (Heartbeat) Timing Parameters ................................................83
10BASE-T Jab and Unjab Timing Parameters....................................................83
Fast Link Pulse Timing Parameters ....................................................................84
MDIO Timing Parameters....................................................................................85
Contents
7

Related parts for SLXT973QC.A2