SLXT973QC.A2

Manufacturer Part NumberSLXT973QC.A2
ManufacturerIntel
SLXT973QC.A2 datasheet
 

Specifications of SLXT973QC.A2

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Table 18. Status Register (Address 1)
Bit
Name
1.15
100BASE-T4
100BASE-X
1.14
Full- Duplex
100BASE-X
1.13
Half- Duplex
10 Mbps Full-
1.12
Duplex
10 Mbps Half-
1.11
Duplex
100BASE-T2
1.10
Full- Duplex
100BASE-T2
1.9
Half- Duplex
1.8
Extended Status
1.7
Reserved
MF Preamble
1.6
Suppression
Auto-Negotiation
1.5
complete
1.4
Remote Fault
Auto-Negotiation
1.3
Ability
1.2
Link Status
1.1
Jabber Detect
Extended
1.0
Capability
1. Refer to
Table 16 on page 61
2. Bits that Latch High (LH) or Latch Low (LL) automatically clear when read.
Datasheet
Document #: 249426
Revision #: 002
Rev. Date: March 1, 2002
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
Description
1 =
PHY able to perform 100BASE-T4
0 =
PHY not able to perform 100BASE-T4
1 =
PHY able to perform full-duplex 100BASE-X
0 =
PHY not able to perform full-duplex 100BASE-X
1 =
PHY able to perform half-duplex 100BASE-X
0 =
PHY not able to perform half-duplex 100BASE-X
1 =
PHY able to operate at 10 Mbps in full-duplex mode
0 =
PHY not able to operate at 10 Mbps full-duplex mode
1 =
PHY able to operate at 10 Mbps in half-duplex mode
0 =
PHY not able to operate at 10 Mbps in half-duplex
1 =
PHY able to perform full-duplex 100BASE-T2
0 =
PHY not able to perform full-duplex 100BASE-T2
1 =
PHY able to perform half-duplex 100BASE-T2
0 =
PHY not able to perform half-duplex 100BASE-T2
1 =
Extended status information in Register 15
0 =
No extended status information in Register 15
0 = Write as 0, ignore on read
PHY accepts management frames with preamble
1 =
suppressed
PHY will not accept management frames with
0 =
preamble suppressed
1 =
Auto-Negotiation process completed
0 =
Auto-Negotiation process not completed
1 =
Remote fault condition detected
0 =
No remote fault condition detected
1 =
PHY is able to perform Auto-Negotiation
0 =
PHY is not able to perform Auto-Negotiation
1 =
Link is up
0 =
Link is down
1 =
Jabber condition detected
0 =
Jabber condition not detected
1 =
Extended register capabilities
0 =
Basic register set capabilities only
for Register Bit Descriptions.
1,2
Type
Default
RO
0
RO
1
RO
1
RO
1
RO
1
RO
0
RO
0
RO
0
RO
0
RO
0
RO
0
RO/LH
0
Note 2
RO
1
RO/LL
0
Note 2
RO/LH
0
Note 2
RO
1
63