SLXT973QC.A2

Manufacturer Part NumberSLXT973QC.A2
ManufacturerIntel
SLXT973QC.A2 datasheet
 


Specifications of SLXT973QC.A2

Lead Free Status / RoHS StatusNot Compliant  
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Contents
3.7.2
Twisted-Pair Interface ............................................................................ 33
3.7.3
Fiber Interface ........................................................................................ 34
3.7.4
Fault Detection and Reporting ............................................................... 34
3.7.5
Remote Fault.......................................................................................... 34
3.7.6
Far End Fault ......................................................................................... 34
3.8
100 Mbps Operation............................................................................................ 35
3.8.1
100BASE-X Network Operations ........................................................... 35
3.8.2
100BASE-X Protocol Sublayer Operations ............................................ 36
3.8.3
PCS Sublayer......................................................................................... 36
3.8.3.1 Preamble Handling.................................................................... 36
3.8.3.2 Dribble Bits ................................................................................ 36
3.8.4
PMA Sublayer ........................................................................................ 37
3.8.4.1 Link Failure Override ................................................................. 37
3.8.4.2 Carrier Sense ............................................................................ 37
3.8.4.3 Twisted-Pair PMD Sublayer ...................................................... 37
3.8.4.4 Scrambler/Descrambler............................................................. 37
3.8.4.5 Baseline Wander Correction ..................................................... 37
3.8.5
Fiber PMD Sublayer ............................................................................... 38
3.8.5.1 Far End Fault Indications .......................................................... 38
3.9
10 Mbps Operation.............................................................................................. 38
3.9.1
Polarity Correction.................................................................................. 38
3.9.2
Dribble Bits............................................................................................. 39
3.9.3
Link Test................................................................................................. 39
3.9.4
Link Failure............................................................................................. 39
3.9.5
Jabber .................................................................................................... 39
3.10
Monitoring Operations......................................................................................... 39
3.10.1 Monitoring Auto-Negotiation................................................................... 39
3.10.2 Per-Port LED Driver Functions............................................................... 39
4.0
Application Information
4.1
Design Recommendations .................................................................................. 41
4.1.1
General Design Guidelines .................................................................... 41
4.1.2
Power Supply Filtering ........................................................................... 41
4.1.3
Power and Ground Plane Layout Considerations .................................. 42
4.1.3.1 Chassis Ground......................................................................... 42
4.1.4
MII Terminations .................................................................................... 42
4.1.5
The Fiber Interface................................................................................. 42
4.1.6
Twisted-Pair Interface ............................................................................ 43
4.1.6.1 Magnetics Information ............................................................... 43
4.2
Typical Application Circuits ................................................................................. 44
4.3
Initialization ......................................................................................................... 47
4.4
MDIO Control Mode ............................................................................................ 47
4.5
Manual Control Mode.......................................................................................... 47
5.0
Configuration
............................................................................................................ 49
6.0
Auto Negotiation
7.0
Auto MDI/MDIX
8.0
100 Mbps Operation
8.1
Displaying Symbol Errors.................................................................................... 53
4
......................................................................................... 41
...................................................................................................... 51
.......................................................................................................... 52
................................................................................................ 53
Datasheet
Document #: 249426
Revision #: 002
Rev. Date: March 1, 2002