SLXT973QC.A2

Manufacturer Part NumberSLXT973QC.A2
ManufacturerIntel
SLXT973QC.A2 datasheet
 


Specifications of SLXT973QC.A2

Lead Free Status / RoHS StatusNot Compliant  
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3.8.4
PMA Sublayer
3.8.4.1
Link Failure Override
The LXT973 normally transmits 100 Mbps data packets or IDLE symbols only if it detects that
link is up, and transmits FLP bursts in auto-negotiation mode or IDLE symbols in forced mode.
Setting Register bit 16.14 = 1 overrides this function, allowing the LXT973 to transmit data
packets even when link is down. This feature is provided as a diagnostic tool.
Note: Auto-negotiation must be disabled to transmit data packets in the absence of link. If auto-
negotiation is enabled, the LXT973 automatically begins transmitting FLP bursts if the link goes
down.
3.8.4.2
Carrier Sense
For 100BASE-TX and 100BASE-FX links, a Start-of-Stream Delimiter (SSD) or /J/K/ symbol pair
causes assertion of carrier sense (CRS). An End-of-Stream Delimiter (ESD), or /T/R/ symbol pair
causes de-assertion of CRS. The PMA layer also de-asserts CRS if IDLE symbols are received
without /T/R/. In this event, the RXER bit in the RX Status Frame is asserted for one clock cycle
when CRS is de-asserted.
3.8.4.3
Twisted-Pair PMD Sublayer
The twisted-pair Physical Medium Dependent (PMD) layer provides the signal scrambling and
descrambling, line coding and decoding (MLT-3), as well as receiving, polarity correction, and
baseline wander correction functions.
3.8.4.4
Scrambler/Descrambler
The purpose of the scrambler is to spread the signal power spectrum and further reduce EMI using
an 11-bit, non-data-dependent polynomial. The receiver automatically decodes the polynomial
whenever IDLE symbols are received.
The scrambler/de scrambler can be bypassed by setting Register bit 16.12 = 1. The scrambler is
automatically bypassed when the fiber port is enabled. Scrambler bypass is provided for diagnostic
and test support.
3.8.4.5
Baseline Wander Correction
The LXT973 provides a baseline wander correction function which makes the device robust under
all network operating conditions. The MLT3 coding scheme used in 100BASE-TX is, by
definition, “unbalanced.” This means that the DC average value of the signal voltage can “wander”
significantly over short time intervals (tenths of seconds). This wander may cause receiver errors,
particularly in less robust designs, at long-line lengths (100 meters). The exact characteristics of
the wander are completely data dependent.
The LXT973 baseline wander correction characteristics allow the device to recover error-free data
while receiving worst-case “killer” packets over all cable lengths.
Datasheet
Document #: 249426
Revision #: 002
Rev. Date: March 1, 2002
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
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