EP2SGX90EF1152C4N Altera, EP2SGX90EF1152C4N Datasheet - Page 195

IC STRATIX II GX 90K 1152-FBGA

EP2SGX90EF1152C4N

Manufacturer Part Number
EP2SGX90EF1152C4N
Description
IC STRATIX II GX 90K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX90EF1152C4N

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520448
Number Of I /o
558
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
For Use With
544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1767
EP2SGX90EF35C4NES

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX90EF1152C4N
Manufacturer:
ALTERA
Quantity:
648
Part Number:
EP2SGX90EF1152C4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2SGX90EF1152C4N
Manufacturer:
ALTERA
0
Altera Corporation
June 2009
GIGE Transmit Jitter Generation
Deterministic Jitter
(peak-to-peak)
Total Jitter
(peak-to-peak)
GIGE Receiver Jitter Tolerance
Deterministic Jitter
Tolerance
(peak-to-peak)
Combined
Deterministic and
Random Jitter
Tolerance
(peak-to-peak)
HiGig Transmit Jitter Generation (4),
Deterministic Jitter
(peak-to-peak)
Total Jitter
(peak-to-peak)
Table 4–19. Stratix II GX Transceiver Block AC Specification
Description
Symbol/
Data Rate =
1.25 Gbps
REFCLK
Pattern = CRPAT
V
No Pre-emphasis
Data Rate =
1.25 Gbps
REFCLK
Pattern = CRPAT
V
No Pre-emphasis
Data Rate =
1.25 Gbps
REFCLK
Pattern = CJPAT
No Equalization
Data Rate =
1.25 Gbps
REFCLK
Pattern = CJPAT
No Equalization
Data Rate =
3.75 Gbps
REFCLK
187.5 MHz
Pattern = CJPAT
V
No Pre-emphasis
Data Rate =
3.75 Gbps
REFCLK
187.5 MHz
Pattern = CJPAT
V
No Pre-emphasis
OD
OD
OD
OD
= 1400 mV
= 1400 mV
= 1200 mV
= 1200 mV
Conditions
= 125 MHz
= 125 MHz
= 125 MHz
= 125 MHz
=
=
(12)
(12)
(13)
Commercial Speed
Min
-
-
-
-
-3 Speed
> 0.66
Grade
> 0.4
Typ
-
-
-
-
0.279
Max
0.14
0.17
0.35
Notes
Min
Commercial and
Industrial Speed
-
-
Stratix II GX Device Handbook, Volume 1
(1), (2),
-4 Speed
> 0.66
Grade
Typ
> 0.4
-
-
DC and Switching Characteristics
(3)
0.279
Max
0.14
(Part 8 of 19)
-
-
Commercial Speed
Min
-
-
-5 Speed
Grade
> 0.66
Typ
> 0.4
-
-
0.279
Max
0.14
4–25
Unit
UI
UI
UI
UI
UI
UI

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