EP2SGX90EF1152C4N Altera, EP2SGX90EF1152C4N Datasheet - Page 222

IC STRATIX II GX 90K 1152-FBGA

EP2SGX90EF1152C4N

Manufacturer Part Number
EP2SGX90EF1152C4N
Description
IC STRATIX II GX 90K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX90EF1152C4N

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520448
Number Of I /o
558
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
90960
# I/os (max)
558
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520448
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
For Use With
544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1767
EP2SGX90EF35C4NES

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX90EF1152C4N
Manufacturer:
ALTERA
Quantity:
648
Part Number:
EP2SGX90EF1152C4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2SGX90EF1152C4N
Manufacturer:
ALTERA
0
Operating Conditions
4–52
Stratix II GX Device Handbook, Volume 1
Note to
(1)
V
V
V
V
V
V
V
V
V
V
V
ΔV
V
V
V
V
V
V
V
Symbol
Table 4–39. SSTL-2 Class II Specifications
Table 4–40. SSTL-2 Class I and II Differential Specifications
Table 4–41. 1.2-V HSTL Specifications
Symbol
IH
IL
IH
IL
OH
OL
CCIO
SWING
X
SWING
ISO
OX
CCIO
REF
IH
IL
IH
IL
Symbol
ISO
(AC)
(DC)
(DC) Low-level DC input voltage
(AC)
(AC) Low-level AC input voltage
(DC)
(DC) High-level DC input voltage
(AC)
(AC) High-level AC input voltage
(AC)
This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the
(DC) DC differential input voltage
(AC) AC differential input voltage
Table
Output supply voltage
Reference voltage
Stratix II GX Architecture
High-level DC input voltage
Low-level DC input voltage
High-level AC input voltage
Low-level AC input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
AC differential input cross
point voltage
Input clock signal offset
voltage
Input clock signal offset
voltage variation
AC differential output cross
point voltage
4–39:
Parameter
Parameter
Parameter
chapter in volume 1 of the Stratix II GX Device Handbook.
Conditions
I
I
OH
OL
Conditions
= 16.4 mA
Conditions
= –16.4 mA
V
V
0.48 V
Minimum
(1)
REF
REF
(V
(V
(1)
–0.15
–0.24
1.14
Minimum
CCIO
CCIO
+ 0.08
+ 0.15
2.375
CCIO
V
V
0.36
V
0.7
Minimum
/2) – 0.2
/2) – 0.2
REF
REF
TT
–0.3
+ 0.76
+ 0.18
+ 0.35
0.5 V
Typical
0.5 V
1.2
Typical
2.5
200
CCIO
Typical
CCIO
(V
(V
V
V
V
V
Maximum
0.52 V
CCIO
CCIO
Maximum
CCIO
CCIO
REF
REF
Altera Corporation
V
V
V
Maximum
V
2.625
1.26
REF
REF
CCIO
TT
/2) + 0.2
/2) + 0.2
– 0.08
– 0.15
+ 0.15
+ 0.24
CCIO
– 0.76
– 0.18
– 0.35
+ 0.3
June 2009
Unit
Unit
Unit
mV
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

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