EP2SGX90EF1152C4N Altera, EP2SGX90EF1152C4N Datasheet - Page 219

• Manufacturer Part Number: EP2SGX90EF1152C4N
• Description: IC STRATIX II GX 90K 1152-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX90EF1152C4N

• Number Of Logic Elements/cells: 90960
• Number Of Labs/clbs: 4548
• Total Ram Bits: 4520448
• Number Of I /o: 558
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 1152-FBGA
• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 90960
• # I/os (max): 558
• Frequency (max): 732.1MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 90960
• Ram Bits: 4520448
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• For Use With: 544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1767; EP2SGX90EF35C4NES

Altera Corporation
June 2009
Note to
(1)
V
V
V
V
V
R
V
V
V
V
V
V
V
V
V
V
V
Table 4–32. LVPECL Specifications
Table 4–33. 3.3-V PCI Specifications
Table 4–34. PCI-X Mode 1 Specifications
Symbol
Symbol
Symbol
CCIO
ID
ICM
OD
OCM
CCIO
IH
IL
OH
OL
CCIO
IH
IL
IPU
OH
OL
L
The top and bottom clock input differential buffers in I/O banks 3, 4, 7, and 8 are powered by V
The PLL clock output/feedback differential buffers are powered by VCC_PLL_OUT. For differential clock
output/feedback operation, connect VCC_PLL_OUT to 3.3 V.
(1)
Table
I/O supply voltage
Input differential voltage
swing (single-ended)
Input common mode voltage
Output differential voltage
(single-ended)
Output common mode
voltage
Receiver differential input
resistor
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
Input pull-up voltage
High-level output voltage
Low-level output voltage
4–32:
Parameter
Parameter
Parameter
R
R
L
L
I
I
I
I
OUT
OUT
OUT
OUT
= 100 Ω
= 100 Ω
Conditions
Conditions
Conditions
= –500 μA
= 1,500 μA
= –500 μA
= 1,500 μA
Minimum
Minimum
Minimum
0.5 V
0.9 V
0.5 V
0.7 V
0.9 V
3.135
1,650
–0.3
–0.3
300
525
3.0
3.0
1.0
Stratix II GX Device Handbook, Volume 1
90
CCIO
CCIO
CCIO
CCIO
CCIO
DC and Switching Characteristics
Typical
Typical
Typical
600
100
3.3
3.3
V
V
0.35 V
Maximum
Maximum
Maximum
0.3 V
0.1 V
0.1 V
CCIO
CCIO
CCINT
3.465
1,000
2,250
970
110
3.6
3.6
2.5
+ 0.5
+ 0.5
CCIO
CCIO
CCIO
, not V
CCIO
CCIO
Unit
Unit
Unit
4–49
mV
mV
mV
V
V
V
V
V
V
V
V
V
V
V
V
V
Ω
.