EP2SGX90EF1152C4N Altera, EP2SGX90EF1152C4N Datasheet - Page 283

• Manufacturer Part Number: EP2SGX90EF1152C4N
• Description: IC STRATIX II GX 90K 1152-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX90EF1152C4N

• Number Of Logic Elements/cells: 90960
• Number Of Labs/clbs: 4548
• Total Ram Bits: 4520448
• Number Of I /o: 558
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 1152-FBGA
• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 90960
• # I/os (max): 558
• Frequency (max): 732.1MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 90960
• Ram Bits: 4520448
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• For Use With: 544-1725 - PCIE KIT W/S II GX EP2SGX90N544-1724 - SI KIT W/SII GX EP2SGX90N544-1702 - VIDEO KIT W/SII GX EP2SGX90N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1767; EP2SGX90EF35C4NES

SSTL-18 Class II OCT_25_OHMS
1.5-V HSTL
Class I
1.8-V HSTL
Class I
1.8-V HSTL
Class II
DIfferential
SSTL-2 Class I
DIfferential
SSTL-2 Class II
DIfferential
SSTL-18 Class I
DIfferential
SSTL-18 Class II
1.8-V differential
HSTL Class I
1.8-V differential
HSTL Class II
1.5-V differential
HSTL Class I
3.3-V LVTTL
Table 4–96. Stratix II GX Maximum Output Clock Rate for Dedicated Clock Pins (Series Termination) (Part
2 of 2)
Table 4–97. Maximum Output Clock Toggle Rate Derating Factors (Part 1 of 5)
I/O Standard
I/O Standard
OCT_50_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
OCT_25_OHMS
OCT_50_OHMS
Drive Strength
Strength
12 mA
16 mA
20 mA
24 mA
Drive
4 mA
8 mA
Table 4–97
for a non 0 pF load.
478
260
213
136
138
134
-3
Column I/O Pins
-3 Speed Grade -4 Speed Grade -5 Speed Grade
Maximum Output Clock Toggle Rate Derating Factors (ps/pF)
specifies the derating factors for the output clock toggle rate
550
600
650
500
600
600
550
650
500
600
510
333
247
197
187
177
560
-4
510
333
247
197
187
177
-5
478
260
213
500
550
600
500
500
550
400
500
600
500
550
-3
-
-
-
Row I/O Pins
510
333
247
-4
-
-
-
510
333
247
-5
-
-
-
450
500
600
450
500
500
350
450
600
450
500
466
291
211
166
154
143
-3
Dedicated Clock
Outputs
510
333
247
197
187
177
-4
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
510
333
247
197
187
177
-5