CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 122

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CY82C693UB

Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Primary Channel IDE PIO (Programmed I/O)
PCI Configuration Registers (Function 1 during Configuration Cycle)
Register 0: Vendor ID Number (Read Only)
Register 1: Device ID Number (Read Only)
Register 2: Command Register (Read/Write)
Bit
15:0
Bit
15:0
Bit
15:10
9
8
7
6:3
2
1
0
Function
Cypress ID Number: 0001000010000000
Function
CY82C693UB Device ID Number: 1100011010010011
Function
Reserved.
Reserved, Must be set to 0.
SERR Reporting Enable:
0:
1:
Reserved, Must be set to 0.
Reserved.
Bus Master Enable.
0
1
Memory Access Enable. This bit is forced to 0 (Memory Access is not allowed to IDE
Controller).
I/O Access Enable.:
0:
1:
The Primary IDE Controller will respond to PIO I/O accesses when this bit is set.
SERR Reporting Disabled
SERR Reporting Enabled
Bus Master Disabled
Bus Master Enabled
Primary IDE controller disabled.
Primary IDE controller enabled.
PRELIMINARY
Index=02H with a 16-bit access
Index=00H with a 16-bit access
Index=04H with a 16-bit access
122
CY82C693UB
Default
1080H
Default
C693H
Default
000000
0
0
0
0000
0
0
0

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