CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 145

• Manufacturer Part Number: CY82C693UB
• Description: Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
• Manufacturer: Cypress Semiconductor Corporation.

Register 20: HcRhPortStatus[1:2] (Read/Write) - Index=54H, 58H with a 32-bit access
Bit
31:21
20
19
18
17
16
15:10
9
8
7:5
4
3
Function
Reserved.
Port Reset Status Change:
This bit indicates that the port reset signal has completed.
0:
1:
Port Over Current Indicator Change:
This bit is set when OverCurrentIndicator changes. Writing a ‘1’ clears this bit. Writing a ‘0’
has no effect.
Port Suspend Status Change:
This bit indicates the completion of the selective resume sequence for the port.
0:
1:
Port Enable Status Change:
This bit indicates that the port has been disabled due to a hardware event (cleared PortEn-
ableStatus).
0:
1:
Connect Status Change:
This bit indicates a connect or disconnect event has been detected. Writing a ‘1’ clears this
bit. Writing a ‘0’ has no effect.
0:
1:
Note: If DeviceRemovable is set, this bit resets to ‘1’.
Reserved.
READ:
Low Speed Device Attached.
This bit defines the speed (and bus idle) of the attached device. It is only valid when Current-
ConnectStatus is set.
0:
1:
WRITE:
Clear Port Power. Writing a ‘1’ clears PortPowerStatus. Writing a ‘0’ has no effect.
READ:
Port Power Status.
This bit reflects the power state of the port regardless of the power switching mode.
0:
1:
Note: if NoPowerSwitching is set, this bit is always read as ‘1’.
WRITE:
Set Port Power. Writing a ‘1’ sets PortPowerStatus. Writing a ‘0’ has no effect.
Reserved.
READ:
Port Reset Status.
0:
1:
WRITE:
Set Port Reset. Writing a ‘1’ sets PortResetStatus. Writing a ‘0’ has no effect.
READ:
Port Over Current Indicator.
The Host Controller supports global over-current reporting. This bit reflects the state of the
OVRCUR pin dedicated to this port. This field is only valid if NoOverCurrentProtection is
cleared and OverCurrentProtectionMode is set.
0:
1:
WRITE:
Clear Port Suspend. Writing a ‘1’ initiates the selective resume sequence for the port. Writing
a ‘0’ has no effect.
Port reset is not complete
Port reset is complete
Port is not resumed
Port resume is complete
Port has not been disabled
PortEnableStatus has been cleared
No connect/disconnect event
Hardware detection of connect/disconnect event
Full Speed device
Low Speed device
Port power is off
Port power is on
Port reset signal is not active
Port reset signal is active
No over-current condition
Over-current condition
PRELIMINARY
145
CY82C693UB
Default
0H
0
0
0
0
0
0H
0
0
0H
0
0