CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 144
CY82C693UB
Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY82C693UB.pdf
(164 pages)
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Register 19: HcRhStatus (Read/Write) - Index=50H with a 32-bit access
Note: This register is reset by the USBReset state.
Bit
31
30:18
17
16
15
14:2
1
0
Function
Clear Remote Wakeup Enable:
Write Only. Writing a ‘1’ to this bit clears DeviceRemoteWakeupEnable. Writing a ‘0’ has no
effect.
Reserved.
Over Current Indicator Change:
This bit is set when OverCurrentIndicator changes. Writing a ‘1’ clears this bit. Writing a ‘0’
has no effect.
READ:
Local Power Status Change. Not supported. Always read ‘0’.
WRITE:
Set Global Power. Writing a ‘1’ issues a SetGlobalPower command to the ports. Writing a ‘0’
has no effects.
READ:
Device Remote Wakeup Enable.
This bit enables ports’ ConnectStatusChange as a remote wakeup event:
0:
1:
WRITE:
Set Remote Wakeup Enable. Writing a ‘1’ sets DeviceRemoteWakeupEnable. Writing a ‘0’
has no effect.
Reserved.
Over Current Indicator:
This bit reflects the state of the OVRCUR pin. This field is only valid if NoOverCurrentProtec-
tion and OverCurrentProtectionMode are cleared.
0:
1:
READ:
Local Power Status. Not supported. Always read ‘0’.
WRITE:
Clear Global Power. Writing a ‘1’ issues a ClearGlobalPower command to the ports. Writing
a ‘0’ has no effect.
Disabled
Enabled
No over-current condition
Over-current condition
PRELIMINARY
144
CY82C693UB
Default
0
0H
0
0
0
0H
-
0
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