CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 143
CY82C693UB
Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY82C693UB.pdf
(164 pages)
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Note: This register is only reset by a power-on reset (PCIRST). It is written during system initialization to configure the
Root Hub. These bit should not be written during normal operation.
Register 18: HcRhDescriptorB (Read/Write) - Index=4CH with a 32-bit access
Note: THis register is only reset by power-on reset (PCIRST). It is written during system initialization to configure the
Root Hub. These bits should not be written during normal configuration.
Bit
31:16
15:0
Function
Port Power Control Mask:
The Host Controller implements global-power switching. This field is only valid if NoPower-
Switching is cleared and PowerSwitchingMode is set (individual port switching). When set,
the port only responds to individual port power switching commands (Set/ClearPortPower).
When cleared, the port only responds to global power switching commands (Set/ClearGlo-
balPower).
0:
1:
Port bit relationship:
bit 16:
bit 17:
bit 18:
...
bit 31:
Unimplemented ports are reserved, read/write ‘0’.
Device Removable:
The Host Controller ports default to removable devices.
0:
1:
Port Bit relationship:
0:
1:
2:
...
15:
Unimplemented ports are reserved, read/write ‘0’.
Device not removable
Global-power mask
Reserved
Port 1
Port 2
Port 15
Device not removable
Device removable
Reserved
Port 1
Port 2
Port 15
PRELIMINARY
143
CY82C693UB
Default
0000H
0000H
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