CY82C693UB Cypress Semiconductor Corporation., CY82C693UB Datasheet - Page 9

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CY82C693UB

Manufacturer Part Number
CY82C693UB
Description
Hypercache Tm / Stand-alone Pci Peripheral Controller With Usb
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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USB Host Controller PCI Configuration Registers (Function 3 during Configuration Cycle) ............... 133
USB Host Controller Operational Registers ......................................................................................... 137
Register 3: Status Register (Read/Write) - Index=06H with a 16-bit access ................................................ 129
Register 4: Revision ID Number (Read Only) - Index=08H with an 8-bit access ......................................... 129
Register 5: Class Code Register (Read Only) - Index=09H with a 32-bit access ......................................... 129
Register 6: Header Type Register (Read Only) - Index=0EH with an 8-bit access ...................................... 129
Register 7: Secondary IDE Command Address Register (Read/Write) - Index=10H with a 32-bit access .. 129
Register 8: Secondary IDE Control Address Register (Read/Write) - Index=14H with a 32-bit access ....... 130
Register 9: Secondary IDE Interrupt INTB Control Register (Read/Write) -
Index=3CH with an 8-bit access .................................................................................................................... 130
Register 10: Secondary IDE Interrupt Pin Control Register (Read Only) - Index=3DH with an 8-bit access 130
Register 11: Secondary IDE Control Register (Read/Write) - Index=40H with a 32-bit access ................... 130
Register 12: Secondary IDE Address Setup Control Register (Read/Write) -
Index=48H with a 32-bit access ..................................................................................................................... 131
Register 13: Secondary Master Drive IDE IOR Command Control Register (Read/Write) -
Index=4CH with an 8-bit access .................................................................................................................... 131
Register 14: Secondary Master Drive IDE IOW Command Control Register (Read/Write) -
Index=4DH with an 8-bit access .................................................................................................................... 131
Register 15: Secondary Slave Drive IDE IOR Command Control Register (Read/Write) -
Index=4EH with an 8-bit access .................................................................................................................... 131
Register 16: Secondary Slave Drive IDE IOW Command Control Register (Read/Write) -
Index=4FH with an 8-bit access .................................................................................................................... 131
Register 17: Secondary Master Drive 8-Bit IDE Command Control Register (Read/Write) -
Index=50H with an 8-bit access ..................................................................................................................... 132
Register 18: Secondary Slave Drive 8-Bit IDE Command Control Register (Read/Write) -
Index=51H with an 8-bit access ..................................................................................................................... 132
Register 19: Secondary Master Drive IORDY Control Register (Read/Write) -
Index=52H with an 8-bit access ..................................................................................................................... 132
Register 0: Vendor ID Number (Read Only) - Index=00H with a 16-bit access ............................................. 133
Register 1: Device ID Number (Read Only) - Index=02H with a 16-bit access ............................................. 133
Register 2: Command Register (Read/Write) - Index=04H with a 16-bit access ........................................... 133
Register 3: Status Registers (Read/Write) - Index=06H with a 16-bit access ............................................... 134
Register 4: Revision ID Number (Read Only) - Index=08H with an 8-bit access .......................................... 134
Register 5: Class Code Register (Read Only) - Index=09H with a 24-bit access .......................................... 135
Register 6: Cache Line Size (Read/Write) - Index=0CH with an 8-bit access ............................................... 135
Register 7: Latency Timer (Read/Write) - Index=0DH with an 8-bit access .................................................. 135
Register 8: Header Type Register (Read Only) - Index=0EH with an 8-bit access ....................................... 135
Register 9: BIST Register (Read Only) - Index=0FH with an 8-bit access .................................................... 135
Register 10: Base Address Register (Read/Write) - Index=10H with a 32-bit access ................................... 135
Register 11: Interrupt LIne Register (Read/Write) - Index=3CH with an 8-bit access ................................... 135
Register 12: Interrupt Pin Register (Read/Write) - Index=3DH with an 8-bit access ..................................... 136
Register 13: Min_Gnt Register (Read Only) - Index=3EH with an 8-bit access ............................................ 136
Register 14: Max_Lat Register (Read Only) - Index=3FD with an 8-bit access ............................................ 136
Register 15: ASIC Test Mode Enable Register (Read/Write) - Index=40H with a 32-bit access ................... 136
Register 16: ASIC Operational Mode Enable Register (Read/Write) - Index=44H with an 8-bit access ....... 136
Register 0: HcRevision (Read Only) - Offset=00H with a 32-bit access ........................................................ 137
Register 1: HcControl (Read/Write) - Offset=04H with a 32-bit access ......................................................... 137
Register 2: HcCommandStatus (Read/Write) - Offset=08H with a 32-bit access .......................................... 138
Register 3: HcInterruptStatus (Read/Write) - Offset=0CH with a 32-bit access ............................................ 138
Register 4: HcInterruptEnable (Read/Write) - Offset=10H with a 32-bit access ............................................ 139
Register 5: HcInterruptDisable (Read/Write) - Offset=14H with a 32-bit access ........................................... 140
Register 6: HcHCCA (Read/Write) - Offset=18H with a 32-bit access .......................................................... 140
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CY82C693UB

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