MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 140

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
DMA
DMA Channel
Control Registers
MC68HC708XL36
140
Each DMA channel control register:
The state of the DMA channel control registers after reset is
indeterminate.
SDC[3:0] — Source/Destination Address Control Bits
Reset:
Read:
Write:
These read/write bits control calculation of the source and destination
addresses as shown in
Freescale Semiconductor, Inc.
SDC[3:0]
Table 8. DMA Channel Control Register Address Summary
For More Information On This Product,
1010
1001
1000
0110
0101
0100
0010
0001
0000
Figure 20. DMA Channel Control Registers (D0C–D2C)
Controls calculation of source and destination addresses.
Selects transfer of 8-bit bytes or 16-bit words on the channel.
Assigns the channel to one of eight DMA transfer sources.
Table 9. Source/Destination Address Register Control
Register
Address
SDC3
Bit 7
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SDC2
6
Source Address
DMA
$0038
D0C
Decrement
Decrement
Decrement
Increment
Increment
Increment
SDC1
Static
Static
Static
5
Table
Indeterminate after Reset
SDC0
9.
4
$0040
D1C
BWC
3
Destination Address
DTS2
2
Decrement
Decrement
Decrement
Increment
Increment
Increment
Static
Static
Static
$0048
D2C
DTS1
1
MOTOROLA
30-dma_b
DTS0
Bit 0

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