MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 152

• Manufacturer Part Number: MC68HC708XL36
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

BRK
Flag Protection
During Break
Interrupts
CPU During Break
Interrupts
DMA During Break
Interrupts
TIM During Break
Interrupts
COP During Break
Interrupts
MC68HC708XL36
152
The BCFE bit in the break flag control register (BFCR) enables software
to clear status bits during the break state.
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
If the DMA is enabled, clear the DMAP bit in the DMA status and control
register before executing a break interrupt.
If a break interrupt is asserted during the current address cycle and the
DMA is active, the DMA releases the internal address and data buses at
the next address boundary to preserve the current MCU state. During
the break interrupt, the DMA continues to arbitrate DMA channel
priorities. After the break interrupt, the DMA becomes active again and
resumes transferring data according to its highest priority service
request.
A break interrupt stops the timer counter.
The COP is disabled during a break interrupt when V
on the RST pin.
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Loading the instruction register with the SWI instruction.
Loading the program counter with $FFFC:$FFFD ($FEFC:$FEFD
in monitor mode).
Go to: www.freescale.com
BRK
DD
+ V
Hi
MOTOROLA
is present
4-brk_a