MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 231

• Manufacturer Part Number: MC68HC708XL36
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

31-spi_c
MOTOROLA
NOTE:
Address: $0011
SPRF — SPI Receiver Full Bit
When the DMA is configured to service the SPI (DMAS = 1), a read by
the CPU of the receive data register can inadvertently clear the SPRF bit
and cause the DMA to miss a service request.
ERRIE — Error Interrupt Enable Bit
Reset:
Read:
Write:
This clearable, read-only flag is set each time a byte transfers from
the shift register to the receive data register. SPRF generates a CPU
interrupt request or a DMA service request if the SPRIE bit in the SPI
control register is set also.
The DMA select bit (DMAS) in the SPI control register determines
whether SPRF generates an SPRF CPU interrupt request or an
SPRF DMA service request. During an SPRF CPU interrupt
(DMAS = 0), the CPU clears SPRF by reading the SPI status and
control register with SPRF set and then reading the SPI data register.
During an SPRF DMA transmission (DMAS = 1), any read of the SPI
data register clears the SPRF bit.
Reset clears the SPRF bit.
This read/write bit enables the MODF and OVRF bits to generate
CPU interrupt requests. Reset clears the ERRIE bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Receive data register full
0 = Receive data register not full
1 = MODF and OVRF can generate CPU interrupt requests
0 = MODF and OVRF cannot generate CPU interrupt requests
Figure 15. SPI Status and Control Register (SPSCR)
SPRF
Bit 7
0
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= Unimplemented
ERRIE
6
0
SPI
OVRF
5
0
MODF
4
0
SPTE
3
1
MODFEN
2
0
MC68HC708XL36
SPR1
1
0
I/O Registers
SPR0
Bit 0
0
231
SPI