EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 182
EZ80F92AZ020EG
Manufacturer Part Number
EZ80F92AZ020EG
Description
IC ACCLAIM MCU 128KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F92AZ020EG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-LQFP
Processor Series
EZ80F92x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3871
EZ80F92AZ020EG
EZ80F92AZ020EG
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Part Number
Manufacturer
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Price
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PS015313-0508
ZDI Master Control Register
The ZDI Master Control register provides control of the eZ80F92 device. It is capable of
forcing a RESET and waking up the eZ80F92 device from the low-power modes (HALT
or SLEEP). See
Table 97. ZDI Master Control Register(ZDI_MASTER_CTL = 11h in ZDI Register
Write Address Spaces)
Bit
Reset
CPU Access
Note: W = Write Only.
Bit
Position
7
ZDI_RESET
[6:0]
Table
Value
0
1
0000000 Reserved.
97.
W
7
0
Description
No action.
Initiate a RESET of the CPU. This bit is automatically
cleared at the end of the RESET event.
W
6
0
W
5
0
W
4
0
W
3
0
Product Specification
W
2
0
eZ80F92/eZ80F93
Zilog Debug Interface
W
1
0
W
0
0
175
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