EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 44

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
Table 4. Clock Peripheral Power-Down Register; (CLK_PPD1 = 00DBh)
Bit
Reset
CPU Access
Note: R/W = Read/Write; R = Read Only.
Bit
Position
7
GPIO_D_OFF
6
GPIO_C_OFF
5
GPIO_B_OFF
4
3
SPI_OFF
2
I2C_OFF
1
UART1_OFF
0
UART0_OFF
Value Description
1
0
1
0
1
0
1
0
1
0
1
0
1
0
System clock to GPIO Port D is powered down.
Port D alternate functions do not operate correctly.
System clock to GPIO Port D is powered up.
System clock to GPIO Port C is powered down.
Port C alternate functions do not operate correctly.
System clock to GPIO Port C is powered up.
System clock to GPIO Port B is powered down.
Port B alternate functions do not operate correctly.
System clock to GPIO Port B is powered up.
Reserved.
System clock to SPI is powered down.
System clock to SPI is powered up.
System clock to I
System clock to I
System clock to UART1 is powered down.
System clock to UART1 is powered up.
System clock to UART0 and IrDA endec is powered down.
System clock to UART0 and IrDA endec is powered up.
R/W
7
0
R/W
6
0
R/W
2
2
5
0
C is powered down.
C is powered up.
R
4
0
R/W
3
0
Product Specification
R/W
2
0
Low-Power Modes
R/W
1
0
R/W
0
0
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