HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 219

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The PC break controller (PBC) provides functions that simplify program debugging. Using these
functions, it is easy to create a self-monitoring debugger, enabling programs to be debugged with
the chip alone, without using an in-circuit emulator. A block diagram of the PC break controller is
shown in figure 6.1.
6.1
• Two break channels (A and B)
• 24-bit break address
• Four types of break compare conditions
• Bus master
• The timing of PC break exception handling after the occurrence of a break condition is as
• Module stop mode can be set
⎯ Bit masking possible
⎯ Instruction fetch
⎯ Data read
⎯ Data write
⎯ Data read/write
⎯ Either CPU or CPU/DTC can be selected
follows:
⎯ Immediately before execution of the instruction fetched at the set address (instruction
⎯ Immediately after execution of the instruction that accesses data at the set address (data
fetch)
access)
Features
Section 6 PC Break Controller (PBC)
Rev. 6.00 Mar. 18, 2010 Page 157 of 982
Section 6 PC Break Controller (PBC)
REJ09B0054-0600

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