HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 375

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

• P13/TIOCD0/TCLKB/A23
Notes: 1. For the setting of the TPU channel, see section 11, 16-Bit Timer Pulse Unit (TPU).
• P12/TIOCC0/TCLKA/A22
Notes: 1. For the setting of the TPU channel, see section 11, 16-Bit Timer Pulse Unit (TPU).
Operating mode
AE3 to AE0
TPU Channel 0
Setting *
P13DDR
Pin functions
Operating mode
AE3 to AE0
TPU Channel 0
Setting *
P12DDR
Pin functions
The pin functions are switched as shown below according to the combination of operating
mode, the TPU channel 0 setting, TPSC2 to TPSC0 bits in TCR_0 to TCR_2, AE3 to AE0 bits
in PFCR and the P13DDR bit.
The pin functions are switched as shown below according to the combination of operating
mode, the TPU channel 0 setting, TPSC2 to TPSC0 bits in TCR_0 to TCR_5, AE3 to AE0 bits
in PFCR, and the P12DDR bit.
2. This pin functions as TIOCD0 input when TPU channel 0 timer operating mode is set to
3. This pin functions as TCLKB input when TPSC2 to TPSC0 in any of TCR_0 to TCR_2
2. This pin functions as TIOCC0 input when TPU channel 0 timer operating mode is set to
3. This pin functions as TCLKB input when TPSC2 to TPSC0 in any of TCR_0 to TCR_5
1
1
normal operating and IOD3 to IOD0 in TIORL_0 are set to 10xx.
are set to 101 or when channels 1 and 5 are set to phase counting mode.
normal operating and IOC3 to IOC0 in TIORL_0 are set to 10xx.
are set to 100 or when channels 1 and 5 are set to phase counting mode.
B'1111
B'1111
output
output
A23
A22
pin
pin
⎯
⎯
⎯
⎯
TIOCD0
TIOCC0
Output
Output
output
output
pin
pin
⎯
⎯
Modes 4 to 6
Modes 4 to 6
Other than B'1111
Other than B'1111
TCLKB input pin *
TCLKA input pin *
P13 input
P12 input
Input or Initial Value
Input or Initial Value
TIOCC0 input pin *
pin
pin
TIOCD0 input *
0
0
output pin
output pin
3
3
P13
P12
Rev. 6.00 Mar. 18, 2010 Page 313 of 982
1
1
2
2
TIOCD0
TIOCC0
Output
Output
output
output
pin
pin
⎯
⎯
TCLKB input pin *
TCLKA input pin *
P13 input
P12 input
Section 10 I/O Ports
Mode 7
Mode 7
Input or Initial Value
Input or Initial Value
TIOCD0 input pin *
TIOCC0 input pin *
pin
pin
REJ09B0054-0600
⎯
⎯
0
0
3
3
output pin
output pin
P13
P12
1
1
2
2