HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 49

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Figure 15.10 Sample Serial Transmission Flowchart ................................................................591
Figure 15.11 Example of SCI Operation in Reception
Figure 15.12 Sample Serial Reception Data Flowchart (1) .......................................................594
Figure 15.12 Sample Serial Reception Data Flowchart (2) .......................................................595
Figure 15.13 Example of Communication Using Multiprocessor Format
Figure 15.14 Sample Multiprocessor Serial Transmission Flowchart.......................................598
Figure 15.15 Example of SCI Operation in Reception
Figure 15.16 Sample Multiprocessor Serial Reception Flowchart (1).......................................600
Figure 15.16 Sample Multiprocessor Serial Reception Flowchart (2).......................................601
Figure 15.17 Data Format in Synchronous Communication (For LSB-First) ...........................602
Figure 15.18 Sample SCI Initialization Flowchart ....................................................................603
Figure 15.19 Sample SCI Transmission Operation in Clocked Synchronous Mode .................604
Figure 15.20 Sample Serial Transmission Flowchart ................................................................605
Figure 15.21 Example of SCI Operation in Reception ..............................................................606
Figure 15.22 Sample Serial Reception Flowchart .....................................................................607
Figure 15.23 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations .....609
Figure 15.24 Schematic Diagram of Smart Card Interface Pin Connections ............................610
Figure 15.25 Normal Smart Card Interface Data Format ..........................................................611
Figure 15.26 Direct Convention (SDIR = SINV = O/E = 0) .....................................................611
Figure 15.27 Inverse Convention (SDIR = SINV = O/E = 1) ...................................................611
Figure 15.28 Receive Data Sampling Timing in Smart Card Mode
Figure 15.29 Retransfer Operation in SCI Transmit Mode .......................................................615
Figure 15.30 TEND Flag Generation Timing in Transmission Operation ................................615
Figure 15.31 Example of Transmission Processing Flow .........................................................616
Figure 15.32 Retransfer Operation in SCI Receive Mode.........................................................617
Figure 15.33 Example of Reception Processing Flow...............................................................618
Figure 15.34 Timing for Fixing Clock Output Level ................................................................618
Figure 15.35 Clock Halt and Restart Procedure ........................................................................619
Figure 15.36 Example of Communication Using SCI Select Function .....................................620
Figure 15.37 Summary of SCI Select Function Operation ........................................................621
Figure 15.38 Example of Clocked Synchronous Transmission by DMAC or DTC..................626
Figure 15.39 Sample Flowchart for Mode Transition during Transmission..............................627
Figure 15.40 Asynchronous Transmission Using Internal Clock ..............................................628
Figure 15.41 Synchronous Transmission Using Internal Clock ................................................628
Figure 15.42 Sample Flowchart for Mode Transition during Reception ...................................629
Figure 15.43 Operation when Switching from SCK Pin Function to Port Pin Function ...........630
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................592
(Transmission of Data H'AA to Receiving Station A) .........................................597
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit).............................599
(Using Clock of 372 Times the Transfer Rate) ....................................................613
Rev. 6.00 Mar. 18, 2010 Page xlvii of lx
REJ09B0054-0600