HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 38

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
20.11 Programmer Mode ............................................................................................................ 743
20.12 Power-Down States for Flash Memory............................................................................. 745
20.13 Flash Memory Programming and Erasing Precautions..................................................... 745
20.14 Note on Switching from F-ZTAT Version to Masked ROM Version .............................. 751
Section 21 Masked ROM ..................................................................................753
21.1 Features............................................................................................................................. 753
Section 22 PROM..............................................................................................755
22.1 PROM Mode Setting......................................................................................................... 755
22.2 Socket Adapter and Memory Map .................................................................................... 755
22.3 Programming..................................................................................................................... 759
Section 23 Clock Pulse Generator .....................................................................765
23.1 Register Descriptions ........................................................................................................ 766
23.2 System Clock Oscillator.................................................................................................... 770
23.3 Duty Adjustment Circuit................................................................................................... 779
23.4 Medium-Speed Clock Divider .......................................................................................... 779
23.5 Bus Master Clock Selection Circuit.................................................................................. 779
23.6 System Clock when Using IEBus ..................................................................................... 779
23.7 Subclock Oscillator ........................................................................................................... 780
23.8 Subclock Waveform Generation Circuit ........................................................................... 781
23.9 Usage Notes ...................................................................................................................... 781
Section 24 Power-Down Modes ........................................................................783
24.1 Register Description.......................................................................................................... 787
Rev. 6.00 Mar. 18, 2010 Page xxxvi of lx
REJ09B0054-0600
22.3.1 Programming and Verification............................................................................. 759
22.3.2 Programming Precautions.................................................................................... 763
22.3.3 Reliability of Programmed Data .......................................................................... 764
23.1.1 System Clock Control Register (SCKCR) ........................................................... 766
23.1.2 Low-Power Control Register (LPWRCR) ........................................................... 768
23.2.1 Connecting a Crystal Resonator........................................................................... 770
23.2.2 External Clock Input............................................................................................ 771
23.2.3 Notes on Switching External Clock ..................................................................... 777
23.7.1 Connecting 32.768-kHz Crystal Resonator.......................................................... 780
23.7.2 Handling Pins when Subclock Not Required....................................................... 781
23.9.1 Note on Crystal Resonator ................................................................................... 781
23.9.2 Note on Board Design.......................................................................................... 782
24.1.1 Standby Control Register (SBYCR) .................................................................... 787
24.1.2 Module Stop Control Registers A to C (MSTPCRA to MSTPCRC)................... 789

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