HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 507

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

12.3.3
TCORB is an 8-bit readable/writable register. TCORB_0 and TCORB_1 (TCORB_2 and
TCORB_3)* comprise a single 16-bit register, so they can be accessed together by word access.
TCORB is continually compared with the value in TCNT. When a match is detected, the
corresponding compare-match flag B (CMFB) in TCSR is set. Note, however, that comparison is
disabled during the T2 state of a TCORB write cycle.
The timer output from the TMO pin can be freely controlled by the compare-match signal B and
the settings of output select bits OS1 and OS0 in TCSR.
The initial value of TCORB is H'FF.
Note: * Not available in the H8S/2237 Group and H8S/2227 Group.
12.3.4
TCR selects the TCNT clock source and the time at which TCNT is cleared, and controls interrupt
requests.
Bit
7
6
5
Bit Name
CMIEB
CMIEA
OVIE
Timer Control Register (TCR)
Time Constant Register B (TCORB)
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Selects whether the CMFB interrupt request (CMIB) is
enabled or disabled when the CMFB flag in TCSR is
set to 1.
0: CMFB interrupt request (CMIB) is disabled
1: CMFB interrupt request (CMIB) is enabled
Compare-Match Interrupt Enable A
Selects whether the CMFA interrupt request (CMIA) is
enabled or disabled when the CMFA flag in TCSR is
set to 1.
0: CMFA interrupt request (CMIA) is disabled
1: CMFA interrupt request (CMIA) is enabled
Timer Overflow Interrupt Enable
Selects whether the OVF interrupt request (OVI) is
enabled or disabled when the OVF flag in TCSR is set
to 1.
0: OVF interrupt request (OVI) is disabled
1: OVF interrupt request (OVI) is enabled
Compare-Match Interrupt Enable B
Rev. 6.00 Mar. 18, 2010 Page 445 of 982
Section 12 8-Bit Timers
REJ09B0054-0600