HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 675

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M = (0.5 – 1/2 × 372) × 100%
15.7.5
Before transmitting and receiving data, initialize the SCI as described below. Initialization is also
necessary when switching from transmit mode to receive mode, or vice versa.
1. Clear the TE and RE bits in SCR to 0.
2. Clear the error flags ERS, PER, and ORER in SSR to 0.
3. Set the GM, BLK, O/E, BCP0, BCP1, CKS0, CKS1 bits in SMR. Set the PE bit to 1.
4. Set the SMIF, SDIR, and SINV bits in SCMR.
5. Set the value corresponding to the bit rate in BRR.
6. Set the CKE0 and CKE1 bits in SCR. Clear the TIE, RIE, TE, RE, MPIE, and TEIE bits to 0.
7. Wait at least one bit interval, then set the TIE, RIE, TE, and RE bits in SCR. Do not set the TE
To switch from receive mode to transmit mode, after checking that the SCI has finished reception,
initialize the SCI, and set RE to 0 and TE to 1. Whether SCI has finished reception or not can be
checked with the RDRF, PER, or ORER flags. To switch from transmit mode to receive mode,
= 49.866%
When the SMIF bit is set to 1, the TxD and RxD pins are both switched from ports to SCI pins,
and are placed in the high-impedance state.
If the CKE0 bit is set to 1, the clock is output from the SCK pin.
bit and RE bit at the same time, except for self-diagnosis.
Initialization
Internal
basic clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
Figure 15.28 Receive Data Sampling Timing in Smart Card Mode
(Using Clock of 372 Times the Transfer Rate)
186 clocks
0
185
372 clocks
Start bit
371
0
Section 15 Serial Communication Interface (SCI)
D0
Rev. 6.00 Mar. 18, 2010 Page 613 of 982
185
371 0
REJ09B0054-0600
D1