HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 572

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 IEBus™ Controller (IEB) [H8S/2258 Group]
14.3.14 IEBus Receive Buffer Register (IERBR)
IERBR is a 1-byte read-only buffer that stores data received in master or slave reception. This
register can be read when the RxRDY flag in IERSR is set to 1. This register indicates the data
field value both in master and slave receptions. This register cannot be modified.
Figure 14.7 shows the relationship between transmission signal format and registers in IEBus data
reception.
Rev. 6.00 Mar. 18, 2010 Page 510 of 982
REJ09B0054-0600
Bit
7
6
5
4
3
2
1
0
Bit Name
RBR7
RBR6
RBR5
RBR4
RBR3
RBR2
RBR1
RBR0
[In slave reception]
Communications frame
Register
[In master reception]
Communications frame
Register settings
Figure 14.7 Relationship between Transmission Signal Format and Registers
Initial Value
0
0
0
0
0
0
0
0
Note: * Received slave address is compared with IEAR1 and IEAR2. If they match,
Master address
Master address
IEMA1, IEMA2 IEAR1, IEAR2
IEAR1, IEAR2 IESA1, IESA2
the following operations are performed.
in IEBus Data Reception
R/W
R
R
R
R
R
R
R
R
Slave address
Slave address
(*)
Description
One-byte read-only buffer that stores data received
in master or slave reception
CTL3 to CTL0
Control bits
Control bits
IERCTL
in IEMCR
Message length
Message length
IERBFL
IERBFL
bits
bits
Data bits
Data bits
IERBR
IERBR

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