HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 464

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 16-Bit Timer Pulse Unit (TPU)
Input Capture Function: The TCNT value can be transferred to TGR on detection of the TIOC
pin input edge.
Rising edge, falling edge, or both edges can be selected as the detection edge. For channels 0, 1,
3*, and 4*, it is also possible to specify another channel’s counter input clock or compare match
signal as the input capture source.
Notes: When another channel’s counter input clock is used as the input capture input for channels
1. Example of setting procedure for input capture operation
2. Example of input capture operation
Rev. 6.00 Mar. 18, 2010 Page 402 of 982
REJ09B0054-0600
Figure 11.9 shows an example of the setting procedure for input capture operation.
Figure 11.10 shows an example of input capture operation.
In this example both rising and falling edges have been selected as the TIOCA pin input
capture input edge, falling edge has been selected as the TIOCB pin input capture input edge,
and counter clearing by TGRB input capture has been designated for TCNT.
* Not available in the H8S/2227 Group.
0 and 3, φ/1 should not be selected as the counter input clock used for input capture input.
Input capture will not be generated if φ/1 is selected.
Figure 11.9 Example of Setting Procedure for Input Capture Operation
<Input capture operation>
Select input capture input
Input selection
Start count
[1]
[2]
[1]
[2]
Designate TGR as an input capture register by
means of TIOR, and select the input capture source
and input signal edge (rising edge, falling
edge, or both edges).
Set the CST bit in TSTR to 1 to start the count
operation.

Related parts for HD64F2239TF20I