SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 168

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.4 Operating Modes
11.4.1
8-Bit Interval Timer Mode
Programming these timers should only be attempted when the timers are not running.
(1) Generating Periodic Interrupts
The TMRA0 and the TMRA1 can be independently programmed as 8-bit interval timers.
stop the TMRA1 (if it is running). Then, set the operating mode, clock source and interrupt interval
in the TA01MOD and TA1REG registers. Then, enable the INTTA1 interrupt and start the
TMRA1.
X = Don’t care,
In the following example, the TMRA1 is used to accomplish periodic interrupt generation. First,
Example: Generating the INTTA1 interrupt at a 20-µs interval (fc = 32 MHz)
Refer to Table 11.2 when selecting a timer clock source.
Note:
TA01RUN
TA01MOD
TA1REG
IMC5LH
TA01RUN
Clocking conditions:
System clock:
Prescaler clock:
The clock inputs to the TMRA0 and the TMRA1 can be one of the following:
TMRA0: TA0IN input, T1, T4 or T16
TMRA1: Match-detect signal from the TMRA0, T1, T16 or T256
MSB
– = No change
7
0
0
X
6
0
1
X
X
TMP1940CYAF-126
5
X
X
0
1
X
High-speed (fc)
fperiph/4 (fperiph = fsys)
4
X
X
1
1
X
3
1
0
0
2
0
0
1
1
1
0
X
0
0
1
LSB
0
X
0
1
Stops and clears the TMRA1.
Selects 8-bit interval timer mode and
µs resolution @fc=32 MHz.)
Sets the time constant value in the TA1REG.
20 µs
Enables INTTA1 and sets the interrupt level to
5. INTTA1 must always be programmed to be
rising-edge triggered.
Starts the TMRA1.
T1 as the clock source (which provides a 0.25-
T1 = 80 (50H)
TMP1940CYAF