SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 448

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2
Supply voltage
Low-level output voltage
High-level output voltage
Note 1: V
Note 2: The DFOSC bit in the SYSCR1 register must be cleared to 0.
Note 3: Tie INTLV high (Interleave mode) when fsys is greater than 20 MHz.
AV
AV
CC
SS
P00–P17
(AD0– AD 15)
P20–PA7
(except P77)
P77 (INT0)
X1
P00–P17
(AD0– AD 15)
P20–PA7 (except P77) V
P77 (INT0)
X1
PLLOFF
RESET
PLLOFF
RESET
Parameter
DC Electrical Characteristics (1/3)
When INTLV is low (i.e., non-interleaved mode), the following conditions must be satisfied:
V
V
CC
SS
16 MHz < fsys
fsys
CC
,
,
, BW0, BW1,
, BW0, BW1,
NMI
NMI
3.3 V, Ta = 25°C, unless otherwise noted.
0 V
16 MHz at 2.7–3.6 V
,
,
20 MHz at 3.0–3.6 V
Symbol
V
V
V
V
V
V
V
V
V
V
CC
IL
IL1
IL2
IL4
IH
IH1
IH2
IH4
OL
OH
PLLON
PLLOFF
(Crystal)
PLLOFF
(External
clock)
V
I
I
OL
OH
CC
1.6 mA
–400 A
2.7 V
TMP1940FDBF-90
Conditions
fosc
fsys
fs
fosc
fsys
fs
fosc
fsys
fs
fosc
fsys
fs
fosc
fsys
fs
(SYSCR1.DFOSC
(Note 2)
30 to 34 kHz
30 to 34 kHz
30 to 34 kHz
30 to 34 kHz
30 to 34 kHz
V
CC
2.5 to 32 MHz
2.5 to 26 MHz
1 to 20 MHz
1 to 20 MHz
1.25 to 16 MHz
5 to 8 MHz
5 to 6.5 MHz
16 to 20 MHz
16 to 20 MHz
20 to 32 MHz
2.7 V
0)
0.80V
0.7V
0.8V
Min
–0.3
3.0
2.7
2.7
2.7
2.0
2.4
CC
CC
CC
Typ (Note 1)
TMP1940FDBF
V
0.25V
Ta
0.3V
0.2V
CC
Max
0.45
3.6
0.6
CC
CC
–40 to 85°C
CC
0.3
Unit
V
V
V