SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 354

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

20. I/O Port Equivalent-Circuit Diagrams
How to read circuit diagrams
standard CMOS logic ICs.
bit when the STBY[1:0] field in the SYSCR2 register is programmed to 01 (i.e., STOP mode) and the
Drive Enable (DRVE) bit in the same register is cleared. If the DRVE bit is set, the STOP signal remains
inactive (at logic 0).
The input protection circuit has a resistor in the range of several tens to several hundreds of ohms.
Port 0 (AD0–AD7), Port 1 (AD8–AD15, A8–A15), Port 2 (A16–A23, A0–A7), P44, P71, P73–
P76, P80–P87, P91–P92, P94–P95, PA0–PA5
P30 ( RD ), P31 ( WR )
P32–P37, P40–P43
The circuit diagrams in this chapter are drawn using the same gate symbols as for the 74HCxx Series
The signal named STOP has a unique function. This signal goes active-high if the CPU sets the HALT
Output Enable
Output Enable
Output Data
Input Data
Output Data
STOP
Input Data
STOP
Output Data
STOP
TMP1940CYAF-312
Input Enable
Input Enable
Vcc
Vcc
P-ch
N-ch
P-ch
N-ch
Vcc
TMP1940CYAF
Vcc
Output
Programmable
Pullup Resistor
Input/Output
Input/Output