SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 240

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SW00ENB-ZCC

Manufacturer Part Number
SW00ENB-ZCC
Description
MCU, MPU & DSP Development Tools CASEWORKS
Manufacturer
Toshiba
Datasheet

Specifications of SW00ENB-ZCC

Tool Type
Development Software Support
Core Architecture
870
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Example: Connecting a master station with two slave stations through a serial link using the fsys/2
Main routine
Main routine
Interrupt routine (INTRX0)
P9CR
P9FC
IMCCLL
IMCCLH
SC0MOD0
SC0BUF
Interrupt routine (INTTX0)
INTCLR
SC0MOD0
SC0BUF
End of interrupt processing
Master controller settings
Slave controller settings
P9CR
P9FC
ODE
IMCCLL
IMCCLH
SC0MOD0
INTCLR
Reg.
if Reg.
Then
SC0MOD0
clock as a serial clock
TXD
Master
Select code
RXD
7
1
0
X
0
*
7
X
0
X
SC0BUF
6
X
0
X
6
0
0
X
*
5
1
1
1
1
5
1
1
1
0
1
*
TMP1940CYAF-198
4
1
1
1
1
0
4
1
1
0
0
1
*
3
0
0
1
0
3
0
0
1
0
0
*
2
1
1
1
0
2
1
1
1
0
0
*
TXD
0x0000_0001
Select Code
1
0
X
1
0
1
0
1
0
X
0
0
1
0
0
*
Slave 1
0
1
1
1
0
1
0
0
0
1
1
1
0
0
1
1
*
RXD
Configures the P90 pin as TXD0 and the P91
pin as RXD0
Enables INTRX0 and sets its interrupt level to 5.
Enables INTTX0 and sets its interrupt level to 4.
Selects 9-bit UART mode and selects fsys/2 as
a serial clock.
Loads the select code for slave 1.
Clears the interrupt request.
Clears the TB0 bit to 0.
Loads the transmit data.
Configures the P90 pin as TXD (open-drain
output) and the P91 pin as RXD.
Enables INTTX0 and INTRX0.
Selects 9-bit UART mode, selects fsys/2 as the
serial clock and and sets the WU bit to 1.
Clears the interrupt request.
Clears the WU bit to 0.
TXD
0x0000_1010
Select Code
Slave 2
TMP1940CYAF
RXD

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