SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 52

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.
0xFFFF_FFFF
0xFF00_0000
0xBFC4_0000
0xBFC0_0000
0xA000_0000
0x8000_0000
0x0003_FFFF
0x0000_0000
Note 3:
Note 4:
Note 1: In the TMP1940CYAF, the on-chip 256-Kbyte ROM is mapped to the addresses from 0x1FC0_0000 through
Note 2: The on-chip ROM is located in a linear address space beginning at physical address 0x1FC0_0000. All types of
Memory Map
The mapping of virtual addresses to physical addresses is shown below.
Examples: 32-bit ISA
The TMP1940CYAF has access to only 16 Mbytes of external physical address space. The 16-Mbyte physical
memory can be located anywhere within the CPU’s 3.5-Gbyte physical address space through use of
programmable chip select signals. However, any address references to the on-chip memory, on-chip peripheral
or reserved regions override external memory access.
No instruction should be placed in the last four words of the physical address space.
0x1FC3_FFFF and the on-chip 10-Kbyte RAM is mapped to the addresses from 0xFFFF_9800 through
0xFFFF_BFFF. In the TMP1940FDBF, the on-chip 512-Kbyte flash ROM is mapped to the addresses from
0x1FC0_0000 through 0x1FC7_FFFF and the on-chip 16-Kbyte RAM is mapped to the addresses from
0xFFFF_8000 through 0xFFFF_BFFF.
exceptions are vectored to the on-chip ROM when the BEV bit of the System Control Coprocessor’s Status
register is set to the default value of 1. (When BEV=0, not all exception vectors reside in contiguous locations.)
When external memory is used, the BEV bit can be cleared to 0. However, using the 32K-byte virtual address
range beginning at 0x0000_0000 helps to improve code efficiency, as shown below. The shaded area starting at
physical address 0x4000_0000 has a size equal to the on-chip ROM size. References to this range (mapped from
the virtual address space starting at 0x0000_0000) are rerouted to the on-chip ROM.
16 Mbytes Reserved
16 Mbytes Reserved
Virtual Address
•
•
•
•
Kseg2
Kseg1
Kseg0
Kuseg
Acessing the 0x0000_0000 + 32-KB region
Accessing other regions
If only on-chip ROM is used:
If ROM is added off-chip:
ADDIU
SW
LUI
ADDIU
SW
0x1FC3_FFF0 thru 0x1FC3_FFFF of TMP1940CYAF’s 256-Kbyte on-chip ROM, or
0x1FC7_FFF0 thru 0x1FC7_FFFF in TMP1940FDBF’s 512-Kbyte on-chip ROM
Last four words of the memory installed in the end-user system
r2, r0, 7
r2, Io (_t) (r0) ; 0x0000_xxxx
r3, hi (_f)
r2, r0, 8
r2, Io (_f) (r3) ; Lower 16-bits of address must be added to upper 16 bits.
16 Mbytes Reserved
16 Mbytes Reserved
Physical Address
On-Chip ROM
On-Chip ROM
Figure 4.1 Memory Map
Inaccessible
Inaccessible
(2 Gbytes)
(1 Gbyte)
TMP1940CYAF-10
Shadow
; r2
;
; r 2
Kuseg
Kseg2
Upper 16 bits of address are loaded into r3
(0x0000_0007)
(0x0000_0008)
0x4007_FFFF
0x4003_FFFF
0x4000_0000
0x1FC3_FFFF
0x1FC0_0000
(r2); Accessed with a single instruction
On-Chip Peripherals
On-Chip RAM (10 KB)
User Program Area
Maskable Interrupt
debugging (2 MB)
Exception Vector
Reserved for
TMP1940CYAF
(255.25 KB)
(Reserved)
(Reserved)
(Reserved)
Area
Area
0xFFFF_E000
0xFFFF_BFFF
0xFFFF_9800
0xFFFF 8000
0xFF3F_FFFF
0xFF20_FFFF
0xFF00_0000
0x1FC3_FFFF
0x1FC0_0400
0x1FC0_0000