SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 419

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Command
Address A23–A16 A15 A14 A13 A12 A11 A10 A9
0xAAA8
0xXXX0
0x0000
0x5554
memory
The addresses to be provided by the CPU are shown below.
Flash
block
F0H, AAH, 55H, A0H, 80H, 10H, 30H:
Command data. Write command data as a byte quantity.
RA: Read Address
RD: Read Data
PA: Program Address
PD: Program Data
The address must be a multiple of four. Write data on a word-by-word basis.
BA: Block Address (BA0–BA18)
Refer to Table 3.18.
BPA: Verify Block Protect Address
BD: Block Protect Data
Refer to Table 3.18. The address of the block to be verified can be any of the addresses within
the block, with A6 = 0, A4 = 1, A3 = 0, A1 = 0 and A0 = 0. If a block is protected, a value of
0x0000_0001 will be returned. If a block is not protected, a value of 0x0000_0000 will be
returned.
X
0
1
0
X
0
0
1
Table 3.17 Addresses Provided by the CPU
X
0
1
0
X
0
0
1
TMP1940FDBF-61
X
0
1
0
CPU Addresses: A23–A0
X
0
0
1
X
0
1
0
A8
X
0
0
1
A7
X
0
1
0
A6
X
0
0
1
A5
X
0
1
0
TMP1940FDBF
A4
X
0
0
1
A3
0
0
1
0
A2
0
0
0
1
A1
0
0
0
0
A0
0
0
0
0