SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 241

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SW00ENB-ZCC

Manufacturer Part Number
SW00ENB-ZCC
Description
MCU, MPU & DSP Development Tools CASEWORKS
Manufacturer
Toshiba
Datasheet

Specifications of SW00ENB-ZCC

Tool Type
Development Software Support
Core Architecture
870
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14. Serial Bus Interface (SBI)
14.1 Block Diagram
Canceller
Noise
modes:
The TMP1940CYAF contains a Serial Bus Interface (SBI) channel, which has the following two operating
T0
SBI Control Register 2 /
X = Don’t care
I
Clock-Synchronous 8-Bit SIO mode
Clock-Synchronous 8-Bit SIO mode, the SBI is connected to external devices via three pins, PA5 (SCK),
PA6 (SO) and PA7 (SI).
I
Clock-Synchronous
8-Bit SIO Mode
2
SBI Status Register
Note: With the TMP1940FDBF with flash memory, the SBI is unusable when the DSU feature is enabled.
2
C Bus mode (with multi-master capability)
C Bus Mode
In I
The following table shows the programming required to put the SBI in each operating mode.
2
SBI0CR2/
C Bus mode, the SBI is connected to external devices via two pins, PA6 (SDA) and PA7 (SCL). In
Synchro-
nization /
SBI0SR
Divider
I
Control
Control
2
Clock
Clock
C Bus
SIO
Address Register
Control Logic
Transfer
I2C0AR
I
2
C Bus
Figure 14.1 SBI Block Diagram
ODE.ODEA7
ODE.ODEA6
TMP1940CYAF-199
thru
XX
11
Buffer Register
Shift Register
SBI0DBR
SBI Data
INTS2 Interrupt Request
PACR.PA7C
PACR.PA5C
SBI Control
Register 1
Data Control
SBI0CR1
SIO Data
thru
11X
011
010
I
Control
2
C Bus
Registers 0 and 1
SBI Baud Rate
SBI0BR0/1
Canceller
TMP1940CYAF
Noise
PAFC.PA7F
PAFC.PA5F
thru
110
111
SCL
SCK
SO
SI
SDA
Control
Output
Input/
(SO/SDA)
(SI/SCL)
(SCK)
PA5
PA6
PA7

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